From: "Roedel, Joerg" <Joerg.Roedel@amd.com>
To: Abhilash Kesavan <kesavan.abhilash@gmail.com>
Cc: "stepanm@codeaurora.org" <stepanm@codeaurora.org>,
"linux-arm-msm@vger.kernel.org" <linux-arm-msm@vger.kernel.org>,
"kvm@vger.kernel.org" <kvm@vger.kernel.org>,
"iommu@lists.linux-foundation.org"
<iommu@lists.linux-foundation.org>,
"pullip.cho@samsung.com" <pullip.cho@samsung.com>
Subject: Re: IOMMU Query
Date: Wed, 23 Mar 2011 10:21:54 +0100 [thread overview]
Message-ID: <20110323092154.GF20444@amd.com> (raw)
In-Reply-To: <AANLkTi=MUeL4w1NU4Lw0myM+nKaiN1umB9r=QJqGeCgj@mail.gmail.com>
On Wed, Mar 23, 2011 at 05:08:45AM -0400, Abhilash Kesavan wrote:
> We are investigating if the generic IOMMU API (include/linux/iommu.h)
> can be used for the IOMMU on our arm-based boards.
Great :-)
> I noticed that msm's IOMMU code (arch/arm/mach-msm/iommu.c) uses the
> genric IOMMU API and have a few queries regarding the supported
> features. Following are some features/requirements of our system:
>
> 1) Multiple IOMMU's - consistency between parallel IOMMUs must be maintained
This is hidden behind the API. The IOMMU driver is responsible for
managing multiple IOMMUs. On x86 there is a unique device<->IOMMU
relationship which is used internally in the drivers. Users of the
IOMMU-API can ignore the fact that there are multiple IOMMUs in the
system.
> 2) Supports varying page sizes - 4K, 64K, 1M, 16M i.e. a sg list of
> contiguous physical memory blocks be made available. Thus, giving us
> mappings from the conservative 4K to large1M reducing TLB misses.
This is supported but also hidden in the IOMMU driver implementation.
the AMD-IOMMU driver implements multiple page-sizes already using this
API. The API user has a function which looks as follows:
int iommu_map(struct iommu_domain *domain,
unsigned long iova,
phys_addr_t paddr,
int gfp_order,
int prot);
this function needs to map the pysically contiguous memory starting at
paddr at the io-virtual address iova. The size of the mapping is
determinded by the gfp_order parameter. The size of the mapping is
basically (2**(gfp_order))*PAGE_SIZE. Note that PAGE_SIZE is the cpu
page-size.
The IOMMU driver has enough information from that function to map the
area with the best-fit page-sizes.
> 3) Multiple VA allocations can be associated with the same PA space.
I don't really understand what you mean here. Can you elabortate?
> Who manages the virtual address space of IO device that has IOMMU? I
> think the generic iommu.h API cannot handle virtual address space and
> memory allocation. Is it just a IOMMU handler? Should we have another
> virtual memory manager for IOMMU?
The layout of the virtual address space for the IO device needs to be
managed by the particular device driver. The IOMMU-API only provides
functions for mapping/unmapping memory.
Regards,
Joerg
--
AMD Operating System Research Center
Advanced Micro Devices GmbH Einsteinring 24 85609 Dornach
General Managers: Alberto Bozzo, Andrew Bowd
Registration: Dornach, Landkr. Muenchen; Registerger. Muenchen, HRB Nr. 43632
next prev parent reply other threads:[~2011-03-23 9:21 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2011-03-23 9:08 IOMMU Query Abhilash Kesavan
2011-03-23 9:21 ` Roedel, Joerg [this message]
2011-03-23 22:18 ` Stepan Moskovchenko
2011-03-24 6:10 ` Joerg Roedel
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