From mboxrd@z Thu Jan 1 00:00:00 1970 From: Cyrill Gorcunov Subject: [patch 1/2] kvm tools: Fix up PCI pin assignment to conform specification Date: Sat, 07 May 2011 19:02:57 +0400 Message-ID: <20110507150520.198777749@gmail.com> References: <20110507150256.898160753@gmail.com> Cc: kvm@vger.kernel.org, mingo@elte.hu, levinsasha928@gmail.com, asias.hejun@gmail.com, prasadjoshi124@gmail.com, Cyrill Gorcunov To: penberg@kernel.org Return-path: Received: from mail-ew0-f46.google.com ([209.85.215.46]:45087 "EHLO mail-ew0-f46.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1755463Ab1EGPFZ (ORCPT ); Sat, 7 May 2011 11:05:25 -0400 Received: by ewy4 with SMTP id 4so1214723ewy.19 for ; Sat, 07 May 2011 08:05:24 -0700 (PDT) Content-Disposition: inline; filename=kvm-tools-irq-pins Sender: kvm-owner@vger.kernel.org List-ID: Only 4 pins are allowed for every PCI compilant device. Mutlifunctional devices can use up to all INTA#,B#,C#,D# pins, for our sindle function devices pin INTA# is enough. Signed-off-by: Cyrill Gorcunov --- tools/kvm/irq.c | 9 +++++++-- 1 file changed, 7 insertions(+), 2 deletions(-) Index: linux-2.6.git/tools/kvm/irq.c ===================================================================== --- linux-2.6.git.orig/tools/kvm/irq.c +++ linux-2.6.git/tools/kvm/irq.c @@ -7,7 +7,6 @@ #include #include -static u8 next_pin = 1; static u8 next_line = 3; static u8 next_dev = 1; static struct rb_root pci_tree = RB_ROOT; @@ -71,7 +70,13 @@ int irq__register_device(u32 dev, u8 *nu *node = (struct pci_dev) { .id = dev, - .pin = next_pin++, + /* + * PCI supports only INTA#,B#,C#,D# per device. + * A#,B#,C#,D# are allowed for multifunctional + * devices so stick with A# for our single + * function devices. + */ + .pin = 1, }; INIT_LIST_HEAD(&node->lines);