From mboxrd@z Thu Jan 1 00:00:00 1970 From: "Roedel, Joerg" Subject: Re: [PATCH] KVM: MMU: Do not unconditionally read PDPTE from guest memory Date: Fri, 29 Jul 2011 13:31:11 +0200 Message-ID: <20110729113111.GL5176@amd.com> References: <1311842177-9542-1-git-send-email-avi@redhat.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Cc: Marcelo Tosatti , "kvm@vger.kernel.org" To: Avi Kivity Return-path: Received: from ch1ehsobe006.messaging.microsoft.com ([216.32.181.186]:24624 "EHLO ch1outboundpool.messaging.microsoft.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932085Ab1G2LcQ (ORCPT ); Fri, 29 Jul 2011 07:32:16 -0400 Content-Disposition: inline In-Reply-To: <1311842177-9542-1-git-send-email-avi@redhat.com> Sender: kvm-owner@vger.kernel.org List-ID: On Thu, Jul 28, 2011 at 04:36:17AM -0400, Avi Kivity wrote: > Architecturally, PDPTEs are cached in the PDPTRs when CR3 is reloaded. > On SVM, it is not possible to implement this, but on VMX this is possible > and was indeed implemented until nested SVM changed this to unconditionally > read PDPTEs dynamically. This has noticable impact when running PAE guests. > > Fix by changing the MMU to read PDPTRs from the cache, falling back to > reading from memory for the nested MMU. > > Signed-off-by: Avi Kivity Hmm, interesting. Sorry for breaking it. I tested the patch on nested svm, it works fine. Tested-by: Joerg Roedel -- AMD Operating System Research Center Advanced Micro Devices GmbH Einsteinring 24 85609 Dornach General Managers: Alberto Bozzo, Andrew Bowd Registration: Dornach, Landkr. Muenchen; Registerger. Muenchen, HRB Nr. 43632