From mboxrd@z Thu Jan 1 00:00:00 1970 From: Marcelo Tosatti Subject: Re: [PATCH 2/2] Qemu co-operation with kvm tsc deadline timer Date: Wed, 14 Sep 2011 08:47:20 -0300 Message-ID: <20110914114720.GB20351@amt.cnet> References: <4E6F72CF.9020609@siemens.com> Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Cc: Jan Kiszka , "Tian, Kevin" , Avi Kivity , "kvm@vger.kernel.org" , "qemu-devel@nongnu.org" To: "Liu, Jinsong" Return-path: Content-Disposition: inline In-Reply-To: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+gceq-qemu-devel=gmane.org@nongnu.org Sender: qemu-devel-bounces+gceq-qemu-devel=gmane.org@nongnu.org List-Id: kvm.vger.kernel.org On Wed, Sep 14, 2011 at 10:51:41AM +0800, Liu, Jinsong wrote: > Jan Kiszka wrote: > > On 2011-09-13 16:38, Liu, Jinsong wrote: > >> From c1b502d6548fcc41592cd90acc82109ee949df75 Mon Sep 17 00:00:00 > >> 2001 > >> From: Liu, Jinsong > >> Date: Tue, 13 Sep 2011 22:05:30 +0800 > >> Subject: [PATCH] Qemu co-operation with kvm tsc deadline timer > >> > >> KVM add emulation of lapic tsc deadline timer for guest. > >> This patch is co-operation work at qemu side. > >> > >> Signed-off-by: Liu, Jinsong --- > >> target-i386/cpu.h | 2 ++ > >> target-i386/kvm.c | 14 ++++++++++++++ > >> 2 files changed, 16 insertions(+), 0 deletions(-) > >> > >> diff --git a/target-i386/cpu.h b/target-i386/cpu.h > >> index 935d08a..62ff73c 100644 > >> --- a/target-i386/cpu.h > >> +++ b/target-i386/cpu.h > >> @@ -283,6 +283,7 @@ > >> #define MSR_IA32_APICBASE_BSP (1<<8) > >> #define MSR_IA32_APICBASE_ENABLE (1<<11) > >> #define MSR_IA32_APICBASE_BASE (0xfffff<<12) > >> +#define MSR_IA32_TSCDEADLINE 0x6e0 > >> > >> #define MSR_MTRRcap 0xfe > >> #define MSR_MTRRcap_VCNT 8 > >> @@ -687,6 +688,7 @@ typedef struct CPUX86State { > >> uint64_t async_pf_en_msr; > >> > >> uint64_t tsc; > >> + uint64_t tsc_deadline; > > > > This field has to be saved/restored for snapshots/migrations. > > > > Frankly, I've no clue right now if substates are in vogue again (they > > had problems in their binary format) or if you can simply add a > > versioned top-level field and bump the CPUState version number. > > > > Yes, it would be saved/restored. After migration, tsc_deadline would be set to MSR_IA32_TSCDEADLINE to trigger tsc timer interrupt. Jan means you should explicitly add this to machine.c.