From mboxrd@z Thu Jan 1 00:00:00 1970 From: Alex Williamson Subject: [PATCH 2/2] pci-assign: Fix MSI-X registration Date: Wed, 21 Sep 2011 21:12:42 -0600 Message-ID: <20110922031242.4121.35090.stgit@s20.home> References: <20110922030909.4121.66872.stgit@s20.home> Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Cc: jan.kiszka@siemens.com, avi@redhat.com, yongjie.ren@intel.com, alex.williamson@redhat.com To: kvm@vger.kernel.org Return-path: Received: from mx1.redhat.com ([209.132.183.28]:8857 "EHLO mx1.redhat.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752047Ab1IVDMq (ORCPT ); Wed, 21 Sep 2011 23:12:46 -0400 In-Reply-To: <20110922030909.4121.66872.stgit@s20.home> Sender: kvm-owner@vger.kernel.org List-ID: Commit c4525754 added a capability check for KVM_CAP_DEVICE_MSIX, which is unfortunately not exposed, resulting in MSIX never being listed as a capability. This breaks anything depending on MSIX, such as igbvf. Since we can't specifically check for MSIX support and KVM_CAP_ASSIGN_DEV_IRQ indicates more than just MSI, let's just revert c4525754 and replace it with a sanity check that we need KVM_CAP_ASSIGN_DEV_IRQ if the device supports any kind of interrupt (which is still mostly paranoia). Signed-off-by: Alex Williamson --- hw/device-assignment.c | 13 +++++++++---- 1 files changed, 9 insertions(+), 4 deletions(-) diff --git a/hw/device-assignment.c b/hw/device-assignment.c index 93913b3..b5bde68 100644 --- a/hw/device-assignment.c +++ b/hw/device-assignment.c @@ -1189,8 +1189,7 @@ static int assigned_device_pci_cap_init(PCIDevice *pci_dev) /* Expose MSI capability * MSI capability is the 1st capability in capability config */ - pos = pci_find_cap_offset(pci_dev, PCI_CAP_ID_MSI, 0); - if (pos != 0 && kvm_check_extension(kvm_state, KVM_CAP_ASSIGN_DEV_IRQ)) { + if ((pos = pci_find_cap_offset(pci_dev, PCI_CAP_ID_MSI, 0))) { dev->cap.available |= ASSIGNED_DEVICE_CAP_MSI; /* Only 32-bit/no-mask currently supported */ if ((ret = pci_add_capability(pci_dev, PCI_CAP_ID_MSI, pos, 10)) < 0) { @@ -1211,8 +1210,7 @@ static int assigned_device_pci_cap_init(PCIDevice *pci_dev) pci_set_word(pci_dev->wmask + pos + PCI_MSI_DATA_32, 0xffff); } /* Expose MSI-X capability */ - pos = pci_find_cap_offset(pci_dev, PCI_CAP_ID_MSIX, 0); - if (pos != 0 && kvm_check_extension(kvm_state, KVM_CAP_DEVICE_MSIX)) { + if ((pos = pci_find_cap_offset(pci_dev, PCI_CAP_ID_MSIX, 0))) { int bar_nr; uint32_t msix_table_entry; @@ -1606,6 +1604,13 @@ static int assigned_initfn(struct PCIDevice *pci_dev) if (assigned_device_pci_cap_init(pci_dev) < 0) goto out; + if (!kvm_check_extension(kvm_state, KVM_CAP_ASSIGN_DEV_IRQ) && + (dev->cap.available & ASSIGNED_DEVICE_CAP_MSIX || + dev->cap.available & ASSIGNED_DEVICE_CAP_MSI || + assigned_dev_pci_read_byte(pci_dev, PCI_INTERRUPT_PIN) != 0)) { + goto out; + } + /* intercept MSI-X entry page in the MMIO */ if (dev->cap.available & ASSIGNED_DEVICE_CAP_MSIX) if (assigned_dev_register_msix_mmio(dev))