* [PATCH] reset edge sense circuit of i8259 on init
@ 2012-01-24 13:06 Gleb Natapov
2012-01-24 13:44 ` Jan Kiszka
` (2 more replies)
0 siblings, 3 replies; 8+ messages in thread
From: Gleb Natapov @ 2012-01-24 13:06 UTC (permalink / raw)
To: kvm; +Cc: avi, mtosatti
The spec says that during initialization "The edge sense circuit is
reset which means that following initialization an interrupt request
(IR) input must make a low-to-high transition to generate an interrupt",
but currently if edge triggered interrupt is in IRR it is delivered
after i8259 initialization.
Signed-off-by: Gleb Natapov <gleb@redhat.com>
diff --git a/arch/x86/kvm/i8259.c b/arch/x86/kvm/i8259.c
index b6a7353..81cf4fa 100644
--- a/arch/x86/kvm/i8259.c
+++ b/arch/x86/kvm/i8259.c
@@ -307,6 +307,7 @@ static void pic_ioport_write(void *opaque, u32 addr, u32 val)
if (val & 0x10) {
s->init4 = val & 1;
s->last_irr = 0;
+ s->irr &= s->elcr;
s->imr = 0;
s->priority_add = 0;
s->special_mask = 0;
--
Gleb.
^ permalink raw reply related [flat|nested] 8+ messages in thread* Re: [PATCH] reset edge sense circuit of i8259 on init 2012-01-24 13:06 [PATCH] reset edge sense circuit of i8259 on init Gleb Natapov @ 2012-01-24 13:44 ` Jan Kiszka 2012-01-24 13:46 ` Gleb Natapov 2012-01-31 15:52 ` Gleb Natapov 2012-02-06 18:16 ` Marcelo Tosatti 2 siblings, 1 reply; 8+ messages in thread From: Jan Kiszka @ 2012-01-24 13:44 UTC (permalink / raw) To: Gleb Natapov; +Cc: kvm, avi, mtosatti On 2012-01-24 14:06, Gleb Natapov wrote: > The spec says that during initialization "The edge sense circuit is > reset which means that following initialization an interrupt request > (IR) input must make a low-to-high transition to generate an interrupt", > but currently if edge triggered interrupt is in IRR it is delivered > after i8259 initialization. > > Signed-off-by: Gleb Natapov <gleb@redhat.com> > diff --git a/arch/x86/kvm/i8259.c b/arch/x86/kvm/i8259.c > index b6a7353..81cf4fa 100644 > --- a/arch/x86/kvm/i8259.c > +++ b/arch/x86/kvm/i8259.c > @@ -307,6 +307,7 @@ static void pic_ioport_write(void *opaque, u32 addr, u32 val) > if (val & 0x10) { > s->init4 = val & 1; > s->last_irr = 0; > + s->irr &= s->elcr; Does & elcr make a relevant difference? QEMU simply sets irr to 0. If that's an issue, we need to fix both. Jan -- Siemens AG, Corporate Technology, CT T DE IT 1 Corporate Competence Center Embedded Linux ^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH] reset edge sense circuit of i8259 on init 2012-01-24 13:44 ` Jan Kiszka @ 2012-01-24 13:46 ` Gleb Natapov 2012-01-24 13:49 ` Jan Kiszka 0 siblings, 1 reply; 8+ messages in thread From: Gleb Natapov @ 2012-01-24 13:46 UTC (permalink / raw) To: Jan Kiszka; +Cc: kvm, avi, mtosatti On Tue, Jan 24, 2012 at 02:44:15PM +0100, Jan Kiszka wrote: > On 2012-01-24 14:06, Gleb Natapov wrote: > > The spec says that during initialization "The edge sense circuit is > > reset which means that following initialization an interrupt request > > (IR) input must make a low-to-high transition to generate an interrupt", > > but currently if edge triggered interrupt is in IRR it is delivered > > after i8259 initialization. > > > > Signed-off-by: Gleb Natapov <gleb@redhat.com> > > diff --git a/arch/x86/kvm/i8259.c b/arch/x86/kvm/i8259.c > > index b6a7353..81cf4fa 100644 > > --- a/arch/x86/kvm/i8259.c > > +++ b/arch/x86/kvm/i8259.c > > @@ -307,6 +307,7 @@ static void pic_ioport_write(void *opaque, u32 addr, u32 val) > > if (val & 0x10) { > > s->init4 = val & 1; > > s->last_irr = 0; > > + s->irr &= s->elcr; > > Does & elcr make a relevant difference? QEMU simply sets irr to 0. If > that's an issue, we need to fix both. > I saw what QEMU does. It's hard to tell looking at the spec what's more correct. I think by zeroing irr we may lose level triggered interrupts that happened just before init. -- Gleb. ^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH] reset edge sense circuit of i8259 on init 2012-01-24 13:46 ` Gleb Natapov @ 2012-01-24 13:49 ` Jan Kiszka 2012-01-24 13:54 ` Gleb Natapov 0 siblings, 1 reply; 8+ messages in thread From: Jan Kiszka @ 2012-01-24 13:49 UTC (permalink / raw) To: Gleb Natapov; +Cc: kvm@vger.kernel.org, avi@redhat.com, mtosatti@redhat.com On 2012-01-24 14:46, Gleb Natapov wrote: > On Tue, Jan 24, 2012 at 02:44:15PM +0100, Jan Kiszka wrote: >> On 2012-01-24 14:06, Gleb Natapov wrote: >>> The spec says that during initialization "The edge sense circuit is >>> reset which means that following initialization an interrupt request >>> (IR) input must make a low-to-high transition to generate an interrupt", >>> but currently if edge triggered interrupt is in IRR it is delivered >>> after i8259 initialization. >>> >>> Signed-off-by: Gleb Natapov <gleb@redhat.com> >>> diff --git a/arch/x86/kvm/i8259.c b/arch/x86/kvm/i8259.c >>> index b6a7353..81cf4fa 100644 >>> --- a/arch/x86/kvm/i8259.c >>> +++ b/arch/x86/kvm/i8259.c >>> @@ -307,6 +307,7 @@ static void pic_ioport_write(void *opaque, u32 addr, u32 val) >>> if (val & 0x10) { >>> s->init4 = val & 1; >>> s->last_irr = 0; >>> + s->irr &= s->elcr; >> >> Does & elcr make a relevant difference? QEMU simply sets irr to 0. If >> that's an issue, we need to fix both. >> > I saw what QEMU does. It's hard to tell looking at the spec what's more > correct. I think by zeroing irr we may lose level triggered interrupts > that happened just before init. Right. If those are supposed to get through despite init, then it is a QEMU bug. Will read the spec again as well. Jan -- Siemens AG, Corporate Technology, CT T DE IT 1 Corporate Competence Center Embedded Linux ^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH] reset edge sense circuit of i8259 on init 2012-01-24 13:49 ` Jan Kiszka @ 2012-01-24 13:54 ` Gleb Natapov 2012-01-24 15:06 ` Jan Kiszka 0 siblings, 1 reply; 8+ messages in thread From: Gleb Natapov @ 2012-01-24 13:54 UTC (permalink / raw) To: Jan Kiszka; +Cc: kvm@vger.kernel.org, avi@redhat.com, mtosatti@redhat.com On Tue, Jan 24, 2012 at 02:49:24PM +0100, Jan Kiszka wrote: > On 2012-01-24 14:46, Gleb Natapov wrote: > > On Tue, Jan 24, 2012 at 02:44:15PM +0100, Jan Kiszka wrote: > >> On 2012-01-24 14:06, Gleb Natapov wrote: > >>> The spec says that during initialization "The edge sense circuit is > >>> reset which means that following initialization an interrupt request > >>> (IR) input must make a low-to-high transition to generate an interrupt", > >>> but currently if edge triggered interrupt is in IRR it is delivered > >>> after i8259 initialization. > >>> > >>> Signed-off-by: Gleb Natapov <gleb@redhat.com> > >>> diff --git a/arch/x86/kvm/i8259.c b/arch/x86/kvm/i8259.c > >>> index b6a7353..81cf4fa 100644 > >>> --- a/arch/x86/kvm/i8259.c > >>> +++ b/arch/x86/kvm/i8259.c > >>> @@ -307,6 +307,7 @@ static void pic_ioport_write(void *opaque, u32 addr, u32 val) > >>> if (val & 0x10) { > >>> s->init4 = val & 1; > >>> s->last_irr = 0; > >>> + s->irr &= s->elcr; > >> > >> Does & elcr make a relevant difference? QEMU simply sets irr to 0. If > >> that's an issue, we need to fix both. > >> > > I saw what QEMU does. It's hard to tell looking at the spec what's more > > correct. I think by zeroing irr we may lose level triggered interrupts > > that happened just before init. > > Right. If those are supposed to get through despite init, then it is a > QEMU bug. Will read the spec again as well. > On real HW they should go through if the IR line is still high. -- Gleb. ^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH] reset edge sense circuit of i8259 on init 2012-01-24 13:54 ` Gleb Natapov @ 2012-01-24 15:06 ` Jan Kiszka 0 siblings, 0 replies; 8+ messages in thread From: Jan Kiszka @ 2012-01-24 15:06 UTC (permalink / raw) To: Gleb Natapov; +Cc: kvm@vger.kernel.org, avi@redhat.com, mtosatti@redhat.com On 2012-01-24 14:54, Gleb Natapov wrote: > On Tue, Jan 24, 2012 at 02:49:24PM +0100, Jan Kiszka wrote: >> On 2012-01-24 14:46, Gleb Natapov wrote: >>> On Tue, Jan 24, 2012 at 02:44:15PM +0100, Jan Kiszka wrote: >>>> On 2012-01-24 14:06, Gleb Natapov wrote: >>>>> The spec says that during initialization "The edge sense circuit is >>>>> reset which means that following initialization an interrupt request >>>>> (IR) input must make a low-to-high transition to generate an interrupt", >>>>> but currently if edge triggered interrupt is in IRR it is delivered >>>>> after i8259 initialization. >>>>> >>>>> Signed-off-by: Gleb Natapov <gleb@redhat.com> >>>>> diff --git a/arch/x86/kvm/i8259.c b/arch/x86/kvm/i8259.c >>>>> index b6a7353..81cf4fa 100644 >>>>> --- a/arch/x86/kvm/i8259.c >>>>> +++ b/arch/x86/kvm/i8259.c >>>>> @@ -307,6 +307,7 @@ static void pic_ioport_write(void *opaque, u32 addr, u32 val) >>>>> if (val & 0x10) { >>>>> s->init4 = val & 1; >>>>> s->last_irr = 0; >>>>> + s->irr &= s->elcr; >>>> >>>> Does & elcr make a relevant difference? QEMU simply sets irr to 0. If >>>> that's an issue, we need to fix both. >>>> >>> I saw what QEMU does. It's hard to tell looking at the spec what's more >>> correct. I think by zeroing irr we may lose level triggered interrupts >>> that happened just before init. >> >> Right. If those are supposed to get through despite init, then it is a >> QEMU bug. Will read the spec again as well. >> > On real HW they should go through if the IR line is still high. Looks like. IMR is cleared, so a level-triggered IRQ is free to pass and set IRR again - even if the chip clears it internally. Will write a patch. Jan -- Siemens AG, Corporate Technology, CT T DE IT 1 Corporate Competence Center Embedded Linux ^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH] reset edge sense circuit of i8259 on init 2012-01-24 13:06 [PATCH] reset edge sense circuit of i8259 on init Gleb Natapov 2012-01-24 13:44 ` Jan Kiszka @ 2012-01-31 15:52 ` Gleb Natapov 2012-02-06 18:16 ` Marcelo Tosatti 2 siblings, 0 replies; 8+ messages in thread From: Gleb Natapov @ 2012-01-31 15:52 UTC (permalink / raw) To: kvm; +Cc: avi, mtosatti On Tue, Jan 24, 2012 at 03:06:05PM +0200, Gleb Natapov wrote: > The spec says that during initialization "The edge sense circuit is > reset which means that following initialization an interrupt request > (IR) input must make a low-to-high transition to generate an interrupt", > but currently if edge triggered interrupt is in IRR it is delivered > after i8259 initialization. > ping > Signed-off-by: Gleb Natapov <gleb@redhat.com> > diff --git a/arch/x86/kvm/i8259.c b/arch/x86/kvm/i8259.c > index b6a7353..81cf4fa 100644 > --- a/arch/x86/kvm/i8259.c > +++ b/arch/x86/kvm/i8259.c > @@ -307,6 +307,7 @@ static void pic_ioport_write(void *opaque, u32 addr, u32 val) > if (val & 0x10) { > s->init4 = val & 1; > s->last_irr = 0; > + s->irr &= s->elcr; > s->imr = 0; > s->priority_add = 0; > s->special_mask = 0; > -- > Gleb. > -- > To unsubscribe from this list: send the line "unsubscribe kvm" in > the body of a message to majordomo@vger.kernel.org > More majordomo info at http://vger.kernel.org/majordomo-info.html -- Gleb. ^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH] reset edge sense circuit of i8259 on init 2012-01-24 13:06 [PATCH] reset edge sense circuit of i8259 on init Gleb Natapov 2012-01-24 13:44 ` Jan Kiszka 2012-01-31 15:52 ` Gleb Natapov @ 2012-02-06 18:16 ` Marcelo Tosatti 2 siblings, 0 replies; 8+ messages in thread From: Marcelo Tosatti @ 2012-02-06 18:16 UTC (permalink / raw) To: Gleb Natapov; +Cc: kvm, avi On Tue, Jan 24, 2012 at 03:06:05PM +0200, Gleb Natapov wrote: > The spec says that during initialization "The edge sense circuit is > reset which means that following initialization an interrupt request > (IR) input must make a low-to-high transition to generate an interrupt", > but currently if edge triggered interrupt is in IRR it is delivered > after i8259 initialization. Applied, thanks. ^ permalink raw reply [flat|nested] 8+ messages in thread
end of thread, other threads:[~2012-02-06 18:52 UTC | newest] Thread overview: 8+ messages (download: mbox.gz follow: Atom feed -- links below jump to the message on this page -- 2012-01-24 13:06 [PATCH] reset edge sense circuit of i8259 on init Gleb Natapov 2012-01-24 13:44 ` Jan Kiszka 2012-01-24 13:46 ` Gleb Natapov 2012-01-24 13:49 ` Jan Kiszka 2012-01-24 13:54 ` Gleb Natapov 2012-01-24 15:06 ` Jan Kiszka 2012-01-31 15:52 ` Gleb Natapov 2012-02-06 18:16 ` Marcelo Tosatti
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