From mboxrd@z Thu Jan 1 00:00:00 1970 From: Joerg Roedel Subject: Re: [patch 1/8] Infrastructure for software and hardware based TSC rate scaling Date: Wed, 8 Feb 2012 15:28:15 +0100 Message-ID: <20120208142815.GB22598@amd.com> References: <20120203174349.110232777@amt.cnet> <20120203174448.911929069@amt.cnet> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Cc: , To: Marcelo Tosatti Return-path: Received: from ch1ehsobe002.messaging.microsoft.com ([216.32.181.182]:52334 "EHLO ch1outboundpool.messaging.microsoft.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752188Ab2BHO2X (ORCPT ); Wed, 8 Feb 2012 09:28:23 -0500 Content-Disposition: inline In-Reply-To: <20120203174448.911929069@amt.cnet> Sender: kvm-owner@vger.kernel.org List-ID: On Fri, Feb 03, 2012 at 03:43:50PM -0200, Marcelo Tosatti wrote: > + if (user_tsc_khz > tsc_khz) { > + vcpu->arch.tsc_catchup = 1; > + vcpu->arch.tsc_always_catchup = 1; > + } else > + WARN(1, "user requested TSC rate below hardware speed\n"); > return; [...] > + if (user_tsc_khz > tsc_khz) { > + vcpu->arch.tsc_catchup = 1; > + vcpu->arch.tsc_always_catchup = 1; > + } else > + WARN(1, "user requested TSC rate below hardware speed\n"); Is it a good idea to have a user-triggerable WARN? Joerg -- AMD Operating System Research Center Advanced Micro Devices GmbH Einsteinring 24 85609 Dornach General Managers: Alberto Bozzo Registration: Dornach, Landkr. Muenchen; Registerger. Muenchen, HRB Nr. 43632