From mboxrd@z Thu Jan 1 00:00:00 1970 From: Gleb Natapov Subject: Re: Questing regarding KVM Guest PMU Date: Thu, 5 Apr 2012 15:37:39 +0300 Message-ID: <20120405123739.GI11204@redhat.com> References: <20120319070728.GI27306@redhat.com> <20120403165850.GA20155@redhat.com> <20120404070435.GA10069@redhat.com> <20120404102932.GA11918@redhat.com> <4F7D8FA6.3030402@redhat.com> Mime-Version: 1.0 Content-Type: text/plain; charset=cp1255 Content-Transfer-Encoding: QUOTED-PRINTABLE Cc: shashank rachamalla , kvm@vger.kernel.org To: Avi Kivity Return-path: Received: from mx1.redhat.com ([209.132.183.28]:30041 "EHLO mx1.redhat.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751692Ab2DEMhl convert rfc822-to-8bit (ORCPT ); Thu, 5 Apr 2012 08:37:41 -0400 Content-Disposition: inline In-Reply-To: <4F7D8FA6.3030402@redhat.com> Sender: kvm-owner@vger.kernel.org List-ID: On Thu, Apr 05, 2012 at 03:27:18PM +0300, Avi Kivity wrote: > On 04/04/2012 01:29 PM, Gleb Natapov wrote: > > > > > > > ok. seems to be. will move over to perf as its working fine insid= e guest. > > >=20 > > Good riddance IMO. I managed to run it on a guest (but not on my > > host!). The thing is buggy. It does not use global ctrl MSR to enab= le > > counters and kvm has all of them disabled by default. I didn't find= what > > value this MSR should have after reset, so this may be either kvm b= ug or > > real BIOSes enable all counters in global ctrl MSR for PMUv1 > > compatibility. Doing "wrmsr 0x38f 0x70000000f" solves this problem.= The > > second problem is that oprofile reprogram PMU counters without > > disabling them first and this is explicitly prohibited by Intel SDM= =2E > > The patch below solve that, but oprofile is the one who should be f= ixed. >=20 > Both should be fixed, there may be other profilers affected. >=20 Global ctrl msr issue I need to investigate further, but second one is bug that should be fixed in oprofile. Intel spec clearly says: EN (Enable Counters) Flag (bit 22) =97 When set, performance counting is enabled in the corresponding performance-monitoring counter; when clear, the corresponding counter is disabled. The event logic unit for a UMASK must be disabled by setting IA32_PERFEVTSELx[bit 22] =3D 0= , before writing to IA32_PMCx. I suspect that on real HW they got wrong result too. It simply subtly wrong, so it is not as noticeable as with kvm. > > > > diff --git a/arch/x86/kvm/pmu.c b/arch/x86/kvm/pmu.c > > index a73f0c1..be05028 100644 > > --- a/arch/x86/kvm/pmu.c > > +++ b/arch/x86/kvm/pmu.c > > @@ -396,6 +396,7 @@ int kvm_pmu_set_msr(struct kvm_vcpu *vcpu, u32 = index, u64 data) > > (pmc =3D get_fixed_pmc(pmu, index))) { > > data =3D (s64)(s32)data; > > pmc->counter +=3D data - read_pmc(pmc); > > + reprogram_gp_counter(pmc, pmc->eventsel); > > return 0; > > } else if ((pmc =3D get_gp_pmc(pmu, index, MSR_P6_EVNTSEL0))) { > > if (data =3D=3D pmc->eventsel) > > >=20 > --=20 > error compiling committee.c: too many arguments to function -- Gleb.