From: Gleb Natapov <gleb@redhat.com>
To: shashank rachamalla <shashank.rachamalla@gmail.com>
Cc: Avi Kivity <avi@redhat.com>, kvm@vger.kernel.org
Subject: Re: Questing regarding KVM Guest PMU
Date: Mon, 9 Apr 2012 12:26:43 +0300 [thread overview]
Message-ID: <20120409092643.GW11918@redhat.com> (raw)
In-Reply-To: <20120408152703.GS11918@redhat.com>
On Sun, Apr 08, 2012 at 06:27:03PM +0300, Gleb Natapov wrote:
> On Fri, Apr 06, 2012 at 09:50:50AM +0300, Gleb Natapov wrote:
> > On Fri, Apr 06, 2012 at 10:43:17AM +0530, shashank rachamalla wrote:
> > > On Thu, Apr 5, 2012 at 8:11 PM, Gleb Natapov <gleb@redhat.com> wrote:
> > > > On Thu, Apr 05, 2012 at 05:38:40PM +0300, Avi Kivity wrote:
> > > >> On 04/05/2012 04:57 PM, Gleb Natapov wrote:
> > > >> > > >
> > > >> > > May be it used NMI based profiling. We should ask oprofile developers.
> > > >> > > As I said I am almost sure my inability to run it on a host is probably
> > > >> > > PEBKAC, although I ran the same script exactly on the host and the
> > > >> > > guest (the script is from the first email of this thread)
> > > >> > >
> > > >> > After upgrading the kernel to latest git from whatever it was there the
> > > >> > same script works and counts CPU_CLK_UNHALT events.
> > > >> >
> > > >>
> > > >> This is even while it violates the Intel guidelines?
> > > >>
> > > > Yes, but who says the result is correct :) It seems that we handle
> > > > global ctrl msr wrong. That is counter can be enabled either in global
> > > > ctrl or in eventsel. Trying to confirm that.
> > > >
> > > if that becomes true then will global ctrl msr have any significance ?
> > When it is in use yes.
> >
> I was wrong. We do handle global ctrl msr correctly, I just ran my test
> incorrectly. If I disable global ctrl on all cpus (for i in `seq 0 15`;
> do wrmsr -p $i 0x38f 0; done) oprofile stops working.
>
After searching high and low I finally found the following in
"Performance Monitoring Unit Sharing Guide" white paper:
Known starting state: Software requires a known starting
state. After CPU reset, all counters and control registers are
disabled and clear/reset to 0. The only exception to this is the
IA32_PERF_GLOBAL_CTRL control MSR, all programmable counter global
enable bits are reset to 1.
Patch will follow.
--
Gleb.
next prev parent reply other threads:[~2012-04-09 9:26 UTC|newest]
Thread overview: 31+ messages / expand[flat|nested] mbox.gz Atom feed top
2012-03-18 10:18 Questing regarding KVM Guest PMU shashank rachamalla
2012-03-18 10:30 ` Gleb Natapov
2012-03-18 12:57 ` shashank rachamalla
2012-03-18 14:50 ` Avi Kivity
2012-03-18 14:50 ` Gleb Natapov
2012-03-18 16:17 ` shashank rachamalla
2012-03-18 16:51 ` Gleb Natapov
2012-03-19 6:50 ` shashank rachamalla
2012-03-19 7:07 ` Gleb Natapov
2012-04-03 13:50 ` shashank rachamalla
2012-04-03 16:58 ` Gleb Natapov
2012-04-03 18:43 ` shashank rachamalla
2012-04-03 18:54 ` shashank rachamalla
2012-04-04 7:04 ` Gleb Natapov
2012-04-04 10:19 ` shashank rachamalla
2012-04-04 10:29 ` Gleb Natapov
2012-04-05 2:37 ` shashank rachamalla
2012-04-05 12:27 ` Avi Kivity
2012-04-05 12:37 ` Gleb Natapov
2012-04-05 12:48 ` Avi Kivity
2012-04-05 13:26 ` Gleb Natapov
2012-04-05 13:28 ` Avi Kivity
2012-04-05 13:48 ` Gleb Natapov
2012-04-05 13:57 ` Gleb Natapov
2012-04-05 14:38 ` Avi Kivity
2012-04-05 14:41 ` Gleb Natapov
2012-04-06 5:13 ` shashank rachamalla
2012-04-06 6:50 ` Gleb Natapov
2012-04-08 15:27 ` Gleb Natapov
2012-04-09 9:26 ` Gleb Natapov [this message]
2012-04-10 3:18 ` shashank rachamalla
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