From mboxrd@z Thu Jan 1 00:00:00 1970 From: "Michael S. Tsirkin" Subject: [PATCH] kvm: document lapic regs field Date: Wed, 23 May 2012 19:16:14 +0300 Message-ID: <20120523161613.GA31296@redhat.com> Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Cc: Avi Kivity , Marcelo Tosatti To: kvm@vger.kernel.org Return-path: Received: from mx1.redhat.com ([209.132.183.28]:12501 "EHLO mx1.redhat.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751145Ab2EWQQK (ORCPT ); Wed, 23 May 2012 12:16:10 -0400 Received: from int-mx02.intmail.prod.int.phx2.redhat.com (int-mx02.intmail.prod.int.phx2.redhat.com [10.5.11.12]) by mx1.redhat.com (8.14.4/8.14.4) with ESMTP id q4NGG9N6016591 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=OK) for ; Wed, 23 May 2012 12:16:09 -0400 Content-Disposition: inline Sender: kvm-owner@vger.kernel.org List-ID: The logic in find_highest_vector looks strange until you realize the reason for the weird memory layout, which is because this is what the CPU microcode expects. Add a comment so this stops tripping people up. Signed-off-by: Michael S. Tsirkin --- arch/x86/kvm/lapic.h | 5 +++++ 1 files changed, 5 insertions(+), 0 deletions(-) diff --git a/arch/x86/kvm/lapic.h b/arch/x86/kvm/lapic.h index 41c62c7..1d1ec08 100644 --- a/arch/x86/kvm/lapic.h +++ b/arch/x86/kvm/lapic.h @@ -15,6 +15,11 @@ struct kvm_lapic { bool irr_pending; s16 isr_count; int isr_cache; + /** + * APIC register page. The layout matches the register layout seen by + * the guest 1:1, because it is accessed by the vmx microcode. + * Note: Only one register, the TPR, is used by the microcode. + */ void *regs; gpa_t vapic_addr; struct page *vapic_page; -- MST