Re: [RFC PATCH 0/2] irq destination caching prototype

[Gleb Natapov <gleb@redhat.com>]

On Mon, Aug 13, 2012 at 12:51:49PM +0300, Michael S. Tsirkin wrote:
> On Mon, Aug 13, 2012 at 12:43:50PM +0300, Avi Kivity wrote:
> > On 08/13/2012 12:16 PM, Gleb Natapov wrote:
> > > Here is a quick prototype of what we discussed yesterday. This one
> > > caches only MSI interrupts for now. The obvious problem is that not
> > > all interrupts (namely IPIs and MSIs using KVM_CAP_SIGNAL_MSI) use irq
> > > routing table, so they cannot be cached.
> > 
> > Missing: switch the uncached path to a work queue, so we don't have to
> > iterate over all vcpus in interrupt context.
> >
> > That isn't trivial; for edge-triggered interrupts we need to ignore
> > zeros (if polarity=0) but for level-triggered interrupts we need them to
> > override the previous setting.  But we don't know the trigger mode and
> > polarity at this point.
> 
> Instead of doing it like this, can we simply require
> callers to use a workqueue?
> Add kvm_set_msi_inatomic that returns WOULDBLOCK if cache is NULL.
> 
kvm_set_msi is simple since it is always edge and bails out very early
if level is 0. I do not yet understand where is the problem with ioapic
though.

--
			Gleb.