Re: [RFC PATCH 0/2] irq destination caching prototype

[Gleb Natapov <gleb@redhat.com>]

On Mon, Aug 13, 2012 at 12:43:50PM +0300, Avi Kivity wrote:
> On 08/13/2012 12:16 PM, Gleb Natapov wrote:
> > Here is a quick prototype of what we discussed yesterday. This one
> > caches only MSI interrupts for now. The obvious problem is that not
> > all interrupts (namely IPIs and MSIs using KVM_CAP_SIGNAL_MSI) use irq
> > routing table, so they cannot be cached.
> 
> Missing: switch the uncached path to a work queue, so we don't have to
> iterate over all vcpus in interrupt context.
> 
> That isn't trivial; for edge-triggered interrupts we need to ignore
> zeros (if polarity=0) but for level-triggered interrupts we need them to
> override the previous setting.  But we don't know the trigger mode and
> polarity at this point.
> 
Looked at it and I think we have enough info about trigger mode and
polarity at the point where cache is checked, but we can't switch to
a work queue there because some callers want to get injection state and
this requires injection to be synchronous. Only high level caller knows
if work queue is OK or not.
 
--
			Gleb.