From mboxrd@z Thu Jan 1 00:00:00 1970 From: Will Deacon Subject: Re: [PATCH v4 06/14] KVM: ARM: Memory virtualization setup Date: Mon, 19 Nov 2012 14:53:51 +0000 Message-ID: <20121119145351.GY3205@mudshark.cambridge.arm.com> References: <20121110154203.2836.46686.stgit@chazy-air> <20121110154252.2836.8720.stgit@chazy-air> Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Cc: "kvm@vger.kernel.org" , "linux-arm-kernel@lists.infradead.org" , "kvmarm@lists.cs.columbia.edu" , Marc Zyngier , Marcelo Tosatti To: Christoffer Dall Return-path: Received: from cam-admin0.cambridge.arm.com ([217.140.96.50]:44572 "EHLO cam-admin0.cambridge.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751778Ab2KSOyK (ORCPT ); Mon, 19 Nov 2012 09:54:10 -0500 Content-Disposition: inline In-Reply-To: <20121110154252.2836.8720.stgit@chazy-air> Sender: kvm-owner@vger.kernel.org List-ID: On Sat, Nov 10, 2012 at 03:42:52PM +0000, Christoffer Dall wrote: > This commit introduces the framework for guest memory management > through the use of 2nd stage translation. Each VM has a pointer > to a level-1 table (the pgd field in struct kvm_arch) which is > used for the 2nd stage translations. Entries are added when handling > guest faults (later patch) and the table itself can be allocated and > freed through the following functions implemented in > arch/arm/kvm/arm_mmu.c: > - kvm_alloc_stage2_pgd(struct kvm *kvm); > - kvm_free_stage2_pgd(struct kvm *kvm); > > Each entry in TLBs and caches are tagged with a VMID identifier in > addition to ASIDs. The VMIDs are assigned consecutively to VMs in the > order that VMs are executed, and caches and tlbs are invalidated when > the VMID space has been used to allow for more than 255 simultaenously > running guests. > > The 2nd stage pgd is allocated in kvm_arch_init_vm(). The table is > freed in kvm_arch_destroy_vm(). Both functions are called from the main > KVM code. > > We pre-allocate page table memory to be able to synchronize using a > spinlock and be called under rcu_read_lock from the MMU notifiers. We > steal the mmu_memory_cache implementation from x86 and adapt for our > specific usage. > > We support MMU notifiers (thanks to Marc Zyngier) through > kvm_unmap_hva and kvm_set_spte_hva. > > Finally, define kvm_phys_addr_ioremap() to map a device at a guest IPA, > which is used by VGIC support to map the virtual CPU interface registers > to the guest. This support is added by Marc Zyngier. > > Reviewed-by: Marcelo Tosatti > Signed-off-by: Marc Zyngier > Signed-off-by: Christoffer Dall Modulo my other comments, this patch looks alright to me. I'll go through with acks for the next series. In the meantime, I'll just skip over the patches that look ok. Cheers, Will