From mboxrd@z Thu Jan 1 00:00:00 1970 From: Will Deacon Subject: Re: [PATCH v4 14/14] KVM: ARM: Handle I/O aborts Date: Mon, 19 Nov 2012 15:09:24 +0000 Message-ID: <20121119150924.GF3205@mudshark.cambridge.arm.com> References: <20121110154203.2836.46686.stgit@chazy-air> <20121110154348.2836.45008.stgit@chazy-air> Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Cc: "kvm@vger.kernel.org" , "linux-arm-kernel@lists.infradead.org" , "kvmarm@lists.cs.columbia.edu" , Marc Zyngier , Marcelo Tosatti , Rusty Russell , dave.martin@linaro.org To: Christoffer Dall Return-path: Received: from cam-admin0.cambridge.arm.com ([217.140.96.50]:44898 "EHLO cam-admin0.cambridge.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752219Ab2KSPJl (ORCPT ); Mon, 19 Nov 2012 10:09:41 -0500 Content-Disposition: inline In-Reply-To: <20121110154348.2836.45008.stgit@chazy-air> Sender: kvm-owner@vger.kernel.org List-ID: On Sat, Nov 10, 2012 at 03:43:49PM +0000, Christoffer Dall wrote: > When the guest accesses I/O memory this will create data abort > exceptions and they are handled by decoding the HSR information > (physical address, read/write, length, register) and forwarding reads > and writes to QEMU which performs the device emulation. > > Certain classes of load/store operations do not support the syndrome > information provided in the HSR and we therefore must be able to fetch > the offending instruction from guest memory and decode it manually. > > We only support instruction decoding for valid reasonable MMIO operations > where trapping them do not provide sufficient information in the HSR (no > 16-bit Thumb instructions provide register writeback that we care about). > > The following instruction types are NOT supported for MMIO operations > despite the HSR not containing decode info: > - any Load/Store multiple > - any load/store exclusive > - any load/store dual > - anything with the PC as the dest register > > This requires changing the general flow somewhat since new calls to run > the VCPU must check if there's a pending MMIO load and perform the write > after userspace has made the data available. > > Rusty Russell fixed a horrible race pointed out by Ben Herrenschmidt: > (1) Guest complicated mmio instruction traps. > (2) The hardware doesn't tell us enough, so we need to read the actual > instruction which was being exectuted. > (3) KVM maps the instruction virtual address to a physical address. > (4) The guest (SMP) swaps out that page, and fills it with something else. > (5) We read the physical address, but now that's the wrong thing. > > Reviewed-by: Marcelo Tosatti > Signed-off-by: Rusty Russell > Signed-off-by: Marc Zyngier > Signed-off-by: Christoffer Dall This is looking like the right sort of thing now, but I would like to see an Acked-by from Dave [CC'd] for this patch. I'll try and hit the vGIC code this week... Thanks, Will