From: Gleb Natapov <gleb@redhat.com>
To: "Zhang, Yang Z" <yang.z.zhang@intel.com>
Cc: "kvm@vger.kernel.org" <kvm@vger.kernel.org>,
"Shan, Haitao" <haitao.shan@intel.com>,
"mtosatti@redhat.com" <mtosatti@redhat.com>,
"Tian, Kevin" <kevin.tian@intel.com>
Subject: Re: [PATCH v9 2/3] x86, apicv: add virtual x2apic support
Date: Thu, 10 Jan 2013 10:53:43 +0200 [thread overview]
Message-ID: <20130110085343.GM700@redhat.com> (raw)
In-Reply-To: <A9667DDFB95DB7438FA9D7D576C3D87E2F5FCE@SHSMSX101.ccr.corp.intel.com>
On Thu, Jan 10, 2013 at 08:31:51AM +0000, Zhang, Yang Z wrote:
> Gleb Natapov wrote on 2013-01-10:
> > On Thu, Jan 10, 2013 at 03:26:07PM +0800, Yang Zhang wrote:
> >> +static void vmx_enable_virtual_x2apic_mode(struct kvm_vcpu *vcpu)
> >> +{
> >> + u32 exec_control;
> >> + int msr;
> >> + struct vcpu_vmx *vmx = to_vmx(vcpu);
> >> +
> >> + if (!cpu_has_vmx_virtualize_x2apic_mode())
> >> + return;
> >> +
> >> + exec_control = vmcs_read32(CPU_BASED_VM_EXEC_CONTROL);
> >> + /* virtualize x2apic mode relies on tpr shadow */
> >> + if (!(exec_control & CPU_BASED_TPR_SHADOW))
> >> + return;
> >> +
> >> + exec_control = vmcs_read32(SECONDARY_VM_EXEC_CONTROL);
> >> + exec_control &= ~SECONDARY_EXEC_VIRTUALIZE_APIC_ACCESSES;
> >> + exec_control |= SECONDARY_EXEC_VIRTUALIZE_X2APIC_MODE;
> >> + vmcs_write32(SECONDARY_VM_EXEC_CONTROL, exec_control);
> >> + vmx->virtual_x2apic_enabled = true;
> >> +
> >> + if (!cpu_has_vmx_virtual_intr_delivery())
> >> + return;
> >> +
> >> + for (msr = 0x800; msr <= 0x8ff; msr++)
> >> + vmx_intercept_for_msr_read(msr, false, false);
> >> +
> >> + /* APIC ID */
> >> + vmx_intercept_for_msr_read(0x802, false, true);
> > Why are you enabling apic id read intercept?
> Current code to read apic id in x2apic mode has some hacks:
>
> if (apic_x2apic_mode(apic))
> val = kvm_apic_id(apic);
> else
> val = kvm_apic_id(apic) << 24;
>
> static inline int kvm_apic_id(struct kvm_lapic *apic)
> {
> return (kvm_apic_get_reg(apic, APIC_ID) >> 24) & 0xff;
> }
>
> According SPEC, in x2apic mode, the whole id reg is used, but in KVM, it only use the highest eight bits.
>
Correct. Put the comment above apic id intercept that we do that since
in x2apic mode apic id is not correctly reflected in apic page.
> >> + /* TMCCT */
> >> + vmx_intercept_for_msr_read(0x839, false, true);
> >> + /* TPR */
> >> + vmx_intercept_for_msr_write(0x808, false, false);
> >> + /* EOI */
> >> + vmx_intercept_for_msr_write(0x80b, false, false);
> >> + /* SELF-IPI */
> >> + vmx_intercept_for_msr_write(0x83f, false, false);
> >> +
> >> +}
> >> +
> >
> > --
> > Gleb.
>
>
> Best regards,
> Yang
>
--
Gleb.
next prev parent reply other threads:[~2013-01-10 8:53 UTC|newest]
Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-01-10 7:26 [PATCH v9 0/3] x86, apicv: Add APIC virtualization support Yang Zhang
2013-01-10 7:26 ` [PATCH v9 1/3] x86, apicv: add APICv register " Yang Zhang
2013-01-10 20:25 ` Marcelo Tosatti
2013-01-10 7:26 ` [PATCH v9 2/3] x86, apicv: add virtual x2apic support Yang Zhang
2013-01-10 7:55 ` Gleb Natapov
2013-01-10 8:32 ` Zhang, Yang Z
2013-01-10 8:52 ` Gleb Natapov
2013-01-10 11:54 ` Zhang, Yang Z
2013-01-10 12:16 ` Gleb Natapov
2013-01-10 12:22 ` Zhang, Yang Z
2013-01-10 12:34 ` Gleb Natapov
2013-01-11 7:36 ` Zhang, Yang Z
2013-01-11 16:54 ` Gleb Natapov
2013-01-14 1:03 ` Zhang, Yang Z
2013-01-14 1:14 ` Zhang, Yang Z
2013-01-11 2:37 ` Zhang, Yang Z
2013-01-11 13:51 ` Gleb Natapov
2013-01-10 8:25 ` Gleb Natapov
2013-01-10 8:31 ` Zhang, Yang Z
2013-01-10 8:53 ` Gleb Natapov [this message]
2013-01-10 7:26 ` [PATCH v9 3/3] x86, apicv: add virtual interrupt delivery support Yang Zhang
2013-01-10 8:23 ` Gleb Natapov
2013-01-10 12:04 ` Zhang, Yang Z
2013-01-10 21:36 ` Marcelo Tosatti
2013-01-11 14:09 ` Gleb Natapov
2013-01-11 17:58 ` Marcelo Tosatti
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