[PATCH v9 0/3] x86, apicv: Add APIC virtualization support

Yang Zhang
2013-01-10T07:29:41Z

From: Yang Zhang <yang.z.zhang@Intel.com>

APIC virtualization is a new feature which can eliminate most of VM exit
when vcpu handle a interrupt:

APIC register virtualization:
APIC read access doesn't cause APIC-access VM exits.
APIC write becomes trap-like.

Virtual interrupt delivery:
Virtual interrupt delivery avoids KVM to inject vAPIC interrupts
manually, which is fully taken care of by the hardware.

Please refer to Intel SDM volume 3, chapter 29 for more details.
Changes v8 to v9:
* Update eoi exit bitmap by vcpu itself.
* Enable virtualize x2apic mode when guest is using x2apic.
* Rebase on top of KVM upstream

Changes v7 to v8:
* According Marcelo's suggestion, add comments for irr_pending and isr_count,
since the two valiables have different meaning when using apicv.
* Set highest bit in vISR to SVI after migation.
* Use spinlock to access eoi exit bitmap synchronously.
* Enable virtualize x2apic mode when guest is using x2apic
* Rebased on top of KVM upstream.

Changes v6 to v7:
* fix a bug when set exit bitmap.
* Rebased on top of KVM upstream.

Changes v5 to v6:
* minor adjustments according gleb's comments
* Rebased on top of KVM upstream.

Changes v4 to v5:
* Set eoi exit bitmap when an interrupt has notifier registered.
* Use request to track ioapic entry's modification.
* Rebased on top of KVM upstream.

Changes v3 to v4:
* use one option to control both register virtualization and virtual interrupt
delivery.
* Update eoi exit bitmap when programing ioapic or programing apic's id/dfr/ldr.
* Rebased on top of KVM upstream.

Changes v2 to v3:
* Drop Posted Interrupt patch from v3.
According Gleb's suggestion, we will use global vector for all VCPUs as notification
event vector. So we will rewrite the Posted Interrupt patch. And resend it later.
* Use TMR to set the eoi exiting bitmap. We only want to set eoi exiting bitmap for
those interrupt which is level trigger or has notifier in EOI write path. So TMR is
enough to distinguish the interrupt trigger mode.
* Simplify some code according Gleb's comments.
* rebased on top of KVM upstream.

Changes v1 to v2:
* Add Posted Interrupt support in this series patch.
* Since there is a notifer hook in vAPIC EOI for PIT interrupt. So always Set PIT
interrupt in eoi exit bitmap to force vmexit when EOI to interrupt.
* Rebased on top of KVM upstream

Yang Zhang (3):
x86, apicv: add APICv register virtualization support
x86, apicv: add virtual x2apic support
x86, apicv: add virtual interrupt delivery support

arch/x86/include/asm/kvm_host.h | 7 +
arch/x86/include/asm/vmx.h | 14 ++
arch/x86/kvm/irq.c | 56 +++++-
arch/x86/kvm/lapic.c | 92 ++++++---
arch/x86/kvm/lapic.h | 25 +++
arch/x86/kvm/svm.c | 24 +++
arch/x86/kvm/vmx.c | 404 ++++++++++++++++++++++++++++++++++++++-
arch/x86/kvm/x86.c | 14 ++-
include/linux/kvm_host.h | 3 +
virt/kvm/ioapic.c | 18 ++
virt/kvm/ioapic.h | 4 +
virt/kvm/irq_comm.c | 22 ++
virt/kvm/kvm_main.c | 5 +
13 files changed, 643 insertions(+), 45 deletions(-)