From mboxrd@z Thu Jan 1 00:00:00 1970 From: Gleb Natapov Subject: Re: [PATCH v11 2/3] x86, apicv: add virtual x2apic support Date: Tue, 22 Jan 2013 17:55:53 +0200 Message-ID: <20130122155553.GG8427@redhat.com> References: <1358331672-32384-1-git-send-email-yang.z.zhang@intel.com> <1358331672-32384-3-git-send-email-yang.z.zhang@intel.com> <20130121195907.GA3561@amt.cnet> Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Cc: Marcelo Tosatti , "kvm@vger.kernel.org" , "Shan, Haitao" , "Zhang, Xiantao" , "Tian, Kevin" To: "Zhang, Yang Z" Return-path: Received: from mx1.redhat.com ([209.132.183.28]:63181 "EHLO mx1.redhat.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754003Ab3AVPzz (ORCPT ); Tue, 22 Jan 2013 10:55:55 -0500 Content-Disposition: inline In-Reply-To: Sender: kvm-owner@vger.kernel.org List-ID: On Tue, Jan 22, 2013 at 12:21:47PM +0000, Zhang, Yang Z wrote: > >> +static void vmx_set_msr_bitmap(struct kvm_vcpu *vcpu) > >> +{ > >> + unsigned long *msr_bitmap; > >> + > >> + if (apic_x2apic_mode(vcpu->arch.apic)) > > > > vcpu->arch.apic can be NULL. > Actually, call apic_x2apic_mode to check whether use x2apic msr bitmap is wrong. > VCPU uses x2apic but it may not set virtual x2apic mode bit due to TPR shadow not enabled or irqchip not in kernel. Check the virtual x2apic mode bit in vmcs directly should be a better choice. How about the follow code: > If TPR shadow it not enabled vmx_msr_bitmap_.*x2apic bitmap will have x2apic MSRs intercepted. > static void vmx_set_msr_bitmap(struct kvm_vcpu *vcpu) > { > unsigned long *msr_bitmap; > > if (vmcs_read32(SECONDARY_VM_EXEC_CONTROL) & SECONDARY_EXEC_VIRTUALIZE_X2APIC_MODE) > if (is_long_mode(vcpu)) > msr_bitmap = vmx_msr_bitmap_longmode_x2apic; > else > msr_bitmap = vmx_msr_bitmap_legacy_x2apic; > else > if (is_long_mode(vcpu)) > msr_bitmap = vmx_msr_bitmap_longmode; > else > msr_bitmap = vmx_msr_bitmap_legacy; > > vmcs_write64(MSR_BITMAP, __pa(msr_bitmap)); > } > > Best regards, > Yang > -- Gleb.