From mboxrd@z Thu Jan 1 00:00:00 1970 From: Gleb Natapov Subject: Re: [PATCH v5] KVM: nVMX: Improve I/O exit handling Date: Mon, 18 Feb 2013 11:36:56 +0200 Message-ID: <20130218093656.GZ9817@redhat.com> References: <20130211100721.GA11107@fermat.math.technion.ac.il> <5118C4F9.707@web.de> <5118D3B5.5010406@siemens.com> <20130214093257.GK9817@redhat.com> <511D30FF.10108@siemens.com> <5121CB15.10206@web.de> <20130218084446.GX9817@redhat.com> <5121EC02.30704@web.de> <20130218085701.GA13680@redhat.com> <5121F19A.5030506@web.de> Mime-Version: 1.0 Content-Type: text/plain; charset=cp1255 Content-Transfer-Encoding: QUOTED-PRINTABLE Cc: Marcelo Tosatti , "Nadav Har'El" , kvm , Orit Wasserman To: Jan Kiszka Return-path: Received: from mx1.redhat.com ([209.132.183.28]:27119 "EHLO mx1.redhat.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752117Ab3BRJhD convert rfc822-to-8bit (ORCPT ); Mon, 18 Feb 2013 04:37:03 -0500 Content-Disposition: inline In-Reply-To: <5121F19A.5030506@web.de> Sender: kvm-owner@vger.kernel.org List-ID: On Mon, Feb 18, 2013 at 10:17:14AM +0100, Jan Kiszka wrote: > From: Jan Kiszka >=20 > This prevents trapping L2 I/O exits if L1 has neither unconditional n= or > bitmap-based exiting enabled. Furthermore, it implements I/O bitmap > handling. We still exit unconditionally in case the CPU does not prov= ide > information for ins/outs. >=20 > Signed-off-by: Jan Kiszka > --- >=20 > Changes in v5: > - still exit unconditionally if CPU refuses to provide exit > information on ins/outs >=20 > arch/x86/kvm/vmx.c | 58 ++++++++++++++++++++++++++++++++++++++++++= ++++++++- > 1 files changed, 56 insertions(+), 2 deletions(-) >=20 > diff --git a/arch/x86/kvm/vmx.c b/arch/x86/kvm/vmx.c > index 6667042..ccc7c17 100644 > --- a/arch/x86/kvm/vmx.c > +++ b/arch/x86/kvm/vmx.c > @@ -651,6 +651,7 @@ static struct vmcs_config { > int size; > int order; > u32 revision_id; > + u32 vmx_basic_high; > u32 pin_based_exec_ctrl; > u32 cpu_based_exec_ctrl; > u32 cpu_based_2nd_exec_ctrl; > @@ -752,6 +753,11 @@ static inline bool vm_need_tpr_shadow(struct kvm= *kvm) > return (cpu_has_vmx_tpr_shadow()) && (irqchip_in_kernel(kvm)); > } > =20 > +static inline bool cpu_has_stringio_exit_info(void) > +{ > + return vmcs_config.vmx_basic_high & (VMX_BASIC_INOUT >> 32); > +} > + > static inline bool cpu_has_secondary_exec_ctrls(void) > { > return vmcs_config.cpu_based_exec_ctrl & > @@ -2635,6 +2641,7 @@ static __init int setup_vmcs_config(struct vmcs= _config *vmcs_conf) > vmcs_conf->size =3D vmx_msr_high & 0x1fff; > vmcs_conf->order =3D get_order(vmcs_config.size); > vmcs_conf->revision_id =3D vmx_msr_low; > + vmcs_conf->vmx_basic_high =3D vmx_msr_high; > =20 > vmcs_conf->pin_based_exec_ctrl =3D _pin_based_exec_control; > vmcs_conf->cpu_based_exec_ctrl =3D _cpu_based_exec_control; > @@ -5908,6 +5915,54 @@ static int (*const kvm_vmx_exit_handlers[])(st= ruct kvm_vcpu *vcpu) =3D { > static const int kvm_vmx_max_exit_handlers =3D > ARRAY_SIZE(kvm_vmx_exit_handlers); > =20 > +static bool nested_vmx_exit_handled_io(struct kvm_vcpu *vcpu, > + struct vmcs12 *vmcs12) > +{ > + unsigned long exit_qualification; > + gpa_t bitmap, last_bitmap; > + u16 port; > + int size; > + u8 b; > + > + if (nested_cpu_has(vmcs12, CPU_BASED_UNCOND_IO_EXITING)) > + return 1; > + > + if (!nested_cpu_has(vmcs12, CPU_BASED_USE_IO_BITMAPS)) > + return 0; > + > + /* TODO: for older CPUs, derive access width from instruction */ > + if (!cpu_has_stringio_exit_info()) > + return 1; > + Sigh, actually I am stupid :( The information that is not available on older cpus is address size in "VM-exit instruction information", not operand size on exit qualification, so your v4 is correct. Except handling of port wrap around: If the =93use I/O bitmaps=94 VM-execution control is 1, the instructi= on causes a VM exit if it attempts to access an I/O port corresponding t= o a bit set to 1 in the appropriate I/O bitmap (see Section 24.6.4). If a= n I/O operation =93wraps around=94 the 16-bit I/O-port space (accesses ports FFFFH and 0000H), the I/O instruction causes a VM exit (the =93unconditional I/O exiting=94 VM-execution control is ignored if th= e =93use I/O bitmaps=94 VM-execution control is 1). > + exit_qualification =3D vmcs_readl(EXIT_QUALIFICATION); > + > + port =3D exit_qualification >> 16; > + size =3D (exit_qualification & 7) + 1; > + > + last_bitmap =3D (gpa_t)-1; > + b =3D -1; > + > + while (size > 0) { > + if (port < 0x8000) > + bitmap =3D vmcs12->io_bitmap_a; > + else > + bitmap =3D vmcs12->io_bitmap_b; > + bitmap +=3D (port & 0x7fff) / 8; > + > + if (last_bitmap !=3D bitmap) > + if (kvm_read_guest(vcpu->kvm, bitmap, &b, 1)) > + return 1; > + if (b & (1 << (port & 7))) > + return 1; > + > + port++; > + size--; > + last_bitmap =3D bitmap; > + } > + > + return 0; > +} > + > /* > * Return 1 if we should exit from L2 to L1 to handle an MSR access = access, > * rather than handle it ourselves in L0. I.e., check whether L1 exp= ressed > @@ -6097,8 +6152,7 @@ static bool nested_vmx_exit_handled(struct kvm_= vcpu *vcpu) > case EXIT_REASON_DR_ACCESS: > return nested_cpu_has(vmcs12, CPU_BASED_MOV_DR_EXITING); > case EXIT_REASON_IO_INSTRUCTION: > - /* TODO: support IO bitmaps */ > - return 1; > + return nested_vmx_exit_handled_io(vcpu, vmcs12); > case EXIT_REASON_MSR_READ: > case EXIT_REASON_MSR_WRITE: > return nested_vmx_exit_handled_msr(vcpu, vmcs12, exit_reason); > --=20 > 1.7.3.4 -- Gleb.