From mboxrd@z Thu Jan  1 00:00:00 1970
From: Gleb Natapov <gleb@redhat.com>
Subject: Re: [PATCH 1/2] KVM: nVMX: Clean up and fix pin-based execution
 controls
Date: Wed, 13 Mar 2013 16:21:31 +0200
Message-ID: <20130313142131.GR11223@redhat.com>
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Cc: Marcelo Tosatti <mtosatti@redhat.com>, kvm <kvm@vger.kernel.org>,
	"Nadav Har'El" <nyh@math.technion.ac.il>,
	"Nakajima, Jun" <jun.nakajima@intel.com>
To: Jan Kiszka <jan.kiszka@siemens.com>
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On Wed, Mar 13, 2013 at 11:30:50AM +0100, Jan Kiszka wrote:
> Only interrupt and NMI exiting are mandatory for KVM to work, thus can
> be exposed to the guest unconditionally, virtual NMI exiting is
> optional. So we must not advertise it unless the host supports it.
> 
> Introduce the symbolic constant PIN_BASED_ALWAYSON_WITHOUT_TRUE_MSR at
> this chance.
> 
> Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Applied, thanks.

> ---
>  arch/x86/include/asm/vmx.h |    2 ++
>  arch/x86/kvm/vmx.c         |   10 ++++++----
>  2 files changed, 8 insertions(+), 4 deletions(-)
> 
> diff --git a/arch/x86/include/asm/vmx.h b/arch/x86/include/asm/vmx.h
> index e1cc048c..056bda5 100644
> --- a/arch/x86/include/asm/vmx.h
> +++ b/arch/x86/include/asm/vmx.h
> @@ -71,6 +71,8 @@
>  #define PIN_BASED_NMI_EXITING                   0x00000008
>  #define PIN_BASED_VIRTUAL_NMIS                  0x00000020
>  
> +#define PIN_BASED_ALWAYSON_WITHOUT_TRUE_MSR	0x00000016
> +
>  #define VM_EXIT_SAVE_DEBUG_CONTROLS             0x00000002
>  #define VM_EXIT_HOST_ADDR_SPACE_SIZE            0x00000200
>  #define VM_EXIT_LOAD_IA32_PERF_GLOBAL_CTRL      0x00001000
> diff --git a/arch/x86/kvm/vmx.c b/arch/x86/kvm/vmx.c
> index f310bcf..0f0cc6a 100644
> --- a/arch/x86/kvm/vmx.c
> +++ b/arch/x86/kvm/vmx.c
> @@ -2041,14 +2041,16 @@ static __init void nested_vmx_setup_ctls_msrs(void)
>  	 */
>  
>  	/* pin-based controls */
> +	rdmsr(MSR_IA32_VMX_PINBASED_CTLS,
> +	      nested_vmx_pinbased_ctls_low, nested_vmx_pinbased_ctls_high);
>  	/*
>  	 * According to the Intel spec, if bit 55 of VMX_BASIC is off (as it is
>  	 * in our case), bits 1, 2 and 4 (i.e., 0x16) must be 1 in this MSR.
>  	 */
> -	nested_vmx_pinbased_ctls_low = 0x16 ;
> -	nested_vmx_pinbased_ctls_high = 0x16 |
> -		PIN_BASED_EXT_INTR_MASK | PIN_BASED_NMI_EXITING |
> -		PIN_BASED_VIRTUAL_NMIS;
> +	nested_vmx_pinbased_ctls_low |= PIN_BASED_ALWAYSON_WITHOUT_TRUE_MSR;
> +	nested_vmx_pinbased_ctls_high &= PIN_BASED_EXT_INTR_MASK |
> +		PIN_BASED_NMI_EXITING | PIN_BASED_VIRTUAL_NMIS;
> +	nested_vmx_pinbased_ctls_high |= PIN_BASED_ALWAYSON_WITHOUT_TRUE_MSR;
>  
>  	/*
>  	 * Exit controls
> -- 
> 1.7.3.4

--
			Gleb.