Re: [PATCH] KVM: x86: Avoid busy loops over uninjectable pending APIC timers

[Marcelo Tosatti <mtosatti@redhat.com>]

> > > But current PI patches do break them, thats my point. So we either
> > > need to revise them again, or drop LAPIC timer reinjection. Making
> > > apic_accept_irq semantics "it returns coalescing info, but only sometimes"
> > > is dubious though.
> > We may rollback to the initial idea: test both irr and pir to get coalescing info. In this case, inject LAPIC timer always in vcpu context. So apic_accept_irq() will return right coalescing info.
> > Also, we need to add comments to tell caller, apic_accept_irq() can ensure the return value is correct only when caller is in target vcpu context.
> > 
> We cannot touch irr while vcpu is in non-root operation, so we will have
> to pass flag to apic_accept_irq() to let it know that it is called
> synchronously. While all this is possible I want to know which guests
> exactly will we break if we will not track interrupt coalescing for
> lapic timer. If only 2.0 smp kernels will break we can probably drop it.

RHEL4 / RHEL5 guests.