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From: Gleb Natapov <gleb@redhat.com>
To: Yang Zhang <yang.z.zhang@intel.com>
Cc: kvm@vger.kernel.org, mtosatti@redhat.com,
	xiantao.zhang@intel.com, jun.nakajima@intel.com,
	Ingo Molnar <mingo@kernel.org>
Subject: Re: [PATCH v8 2/7] KVM: VMX: Register a new IPI for posted interrupt
Date: Tue, 9 Apr 2013 10:26:59 +0300	[thread overview]
Message-ID: <20130409072659.GQ17919@redhat.com> (raw)
In-Reply-To: <1365431002-31202-3-git-send-email-yang.z.zhang@intel.com>

On Mon, Apr 08, 2013 at 10:23:17PM +0800, Yang Zhang wrote:
> From: Yang Zhang <yang.z.zhang@Intel.com>
> 
> Posted Interrupt feature requires a special IPI to deliver posted interrupt
> to guest. And it should has a high priority so the interrupt will not be
> blocked by others.
> Normally, the posted interrupt will be consumed by vcpu if target vcpu is
> running and transparent to OS. But in some cases, the interrupt will arrive
> when target vcpu is scheduled out. And host will see it. So we need to
> register a dump handler to handle it.

Ingo can I add your ACK to this one? In the past you agreed to the
approach.

> 
> Signed-off-by: Yang Zhang <yang.z.zhang@Intel.com>
> ---
>  arch/x86/include/asm/entry_arch.h  |    4 ++++
>  arch/x86/include/asm/hardirq.h     |    3 +++
>  arch/x86/include/asm/hw_irq.h      |    1 +
>  arch/x86/include/asm/irq_vectors.h |    5 +++++
>  arch/x86/kernel/entry_64.S         |    5 +++++
>  arch/x86/kernel/irq.c              |   22 ++++++++++++++++++++++
>  arch/x86/kernel/irqinit.c          |    4 ++++
>  7 files changed, 44 insertions(+), 0 deletions(-)
> 
> diff --git a/arch/x86/include/asm/entry_arch.h b/arch/x86/include/asm/entry_arch.h
> index 40afa00..9bd4eca 100644
> --- a/arch/x86/include/asm/entry_arch.h
> +++ b/arch/x86/include/asm/entry_arch.h
> @@ -19,6 +19,10 @@ BUILD_INTERRUPT(reboot_interrupt,REBOOT_VECTOR)
>  
>  BUILD_INTERRUPT(x86_platform_ipi, X86_PLATFORM_IPI_VECTOR)
>  
> +#ifdef CONFIG_HAVE_KVM
> +BUILD_INTERRUPT(kvm_posted_intr_ipi, POSTED_INTR_VECTOR)
> +#endif
> +
>  /*
>   * every pentium local APIC has two 'local interrupts', with a
>   * soft-definable vector attached to both interrupts, one of
> diff --git a/arch/x86/include/asm/hardirq.h b/arch/x86/include/asm/hardirq.h
> index 81f04ce..ab0ae1a 100644
> --- a/arch/x86/include/asm/hardirq.h
> +++ b/arch/x86/include/asm/hardirq.h
> @@ -12,6 +12,9 @@ typedef struct {
>  	unsigned int irq_spurious_count;
>  	unsigned int icr_read_retry_count;
>  #endif
> +#ifdef CONFIG_HAVE_KVM
> +	unsigned int kvm_posted_intr_ipis;
> +#endif
>  	unsigned int x86_platform_ipis;	/* arch dependent */
>  	unsigned int apic_perf_irqs;
>  	unsigned int apic_irq_work_irqs;
> diff --git a/arch/x86/include/asm/hw_irq.h b/arch/x86/include/asm/hw_irq.h
> index 10a78c3..1da97ef 100644
> --- a/arch/x86/include/asm/hw_irq.h
> +++ b/arch/x86/include/asm/hw_irq.h
> @@ -28,6 +28,7 @@
>  /* Interrupt handlers registered during init_IRQ */
>  extern void apic_timer_interrupt(void);
>  extern void x86_platform_ipi(void);
> +extern void kvm_posted_intr_ipi(void);
>  extern void error_interrupt(void);
>  extern void irq_work_interrupt(void);
>  
> diff --git a/arch/x86/include/asm/irq_vectors.h b/arch/x86/include/asm/irq_vectors.h
> index aac5fa6..5702d7e 100644
> --- a/arch/x86/include/asm/irq_vectors.h
> +++ b/arch/x86/include/asm/irq_vectors.h
> @@ -102,6 +102,11 @@
>   */
>  #define X86_PLATFORM_IPI_VECTOR		0xf7
>  
> +/* Vector for KVM to deliver posted interrupt IPI */
> +#ifdef CONFIG_HAVE_KVM
> +#define POSTED_INTR_VECTOR		0xf2
> +#endif
> +
>  /*
>   * IRQ work vector:
>   */
> diff --git a/arch/x86/kernel/entry_64.S b/arch/x86/kernel/entry_64.S
> index c1d01e6..7272089 100644
> --- a/arch/x86/kernel/entry_64.S
> +++ b/arch/x86/kernel/entry_64.S
> @@ -1166,6 +1166,11 @@ apicinterrupt LOCAL_TIMER_VECTOR \
>  apicinterrupt X86_PLATFORM_IPI_VECTOR \
>  	x86_platform_ipi smp_x86_platform_ipi
>  
> +#ifdef CONFIG_HAVE_KVM
> +apicinterrupt POSTED_INTR_VECTOR \
> +	kvm_posted_intr_ipi smp_kvm_posted_intr_ipi
> +#endif
> +
>  apicinterrupt THRESHOLD_APIC_VECTOR \
>  	threshold_interrupt smp_threshold_interrupt
>  apicinterrupt THERMAL_APIC_VECTOR \
> diff --git a/arch/x86/kernel/irq.c b/arch/x86/kernel/irq.c
> index e4595f1..6ae6ea1 100644
> --- a/arch/x86/kernel/irq.c
> +++ b/arch/x86/kernel/irq.c
> @@ -228,6 +228,28 @@ void smp_x86_platform_ipi(struct pt_regs *regs)
>  	set_irq_regs(old_regs);
>  }
>  
> +#ifdef CONFIG_HAVE_KVM
> +/*
> + * Handler for POSTED_INTERRUPT_VECTOR.
> + */
> +void smp_kvm_posted_intr_ipi(struct pt_regs *regs)
> +{
> +	struct pt_regs *old_regs = set_irq_regs(regs);
> +
> +	ack_APIC_irq();
> +
> +	irq_enter();
> +
> +	exit_idle();
> +
> +	inc_irq_stat(kvm_posted_intr_ipis);
> +
> +	irq_exit();
> +
> +	set_irq_regs(old_regs);
> +}
> +#endif
> +
>  EXPORT_SYMBOL_GPL(vector_used_by_percpu_irq);
>  
>  #ifdef CONFIG_HOTPLUG_CPU
> diff --git a/arch/x86/kernel/irqinit.c b/arch/x86/kernel/irqinit.c
> index 7dc4e45..a2a1fbc 100644
> --- a/arch/x86/kernel/irqinit.c
> +++ b/arch/x86/kernel/irqinit.c
> @@ -172,6 +172,10 @@ static void __init apic_intr_init(void)
>  
>  	/* IPI for X86 platform specific use */
>  	alloc_intr_gate(X86_PLATFORM_IPI_VECTOR, x86_platform_ipi);
> +#ifdef CONFIG_HAVE_KVM
> +	/* IPI for KVM to deliver posted interrupt */
> +	alloc_intr_gate(POSTED_INTR_VECTOR, kvm_posted_intr_ipi);
> +#endif
>  
>  	/* IPI vectors for APIC spurious and error interrupts */
>  	alloc_intr_gate(SPURIOUS_APIC_VECTOR, spurious_interrupt);
> -- 
> 1.7.1

--
			Gleb.

  reply	other threads:[~2013-04-09  7:27 UTC|newest]

Thread overview: 15+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2013-04-08 14:23 [PATCH v8 0/7] KVM: VMX: Add Posted Interrupt supporting Yang Zhang
2013-04-08 14:23 ` [PATCH v8 1/7] KVM: VMX: Enable acknowledge interupt on vmexit Yang Zhang
2013-04-08 14:23 ` [PATCH v8 2/7] KVM: VMX: Register a new IPI for posted interrupt Yang Zhang
2013-04-09  7:26   ` Gleb Natapov [this message]
2013-04-10  9:31     ` Ingo Molnar
2013-04-08 14:23 ` [PATCH v8 3/7] KVM: VMX: Check the posted interrupt capability Yang Zhang
2013-04-08 14:23 ` [PATCH v8 4/7] KVM: Call common update function when ioapic entry changed Yang Zhang
2013-04-09  7:45   ` Gleb Natapov
2013-04-08 14:23 ` [PATCH v8 5/7] KVM: Set TMR when programming ioapic entry Yang Zhang
2013-04-08 14:23 ` [PATCH v8 6/7] KVM: VMX: Add the algorithm of deliver posted interrupt Yang Zhang
2013-04-09 16:31   ` Paolo Bonzini
2013-04-10  2:16     ` Zhang, Yang Z
2013-04-08 14:23 ` [PATCH v8 7/7] KVM: VMX: Use posted interrupt to deliver virtual interrupt Yang Zhang
2013-04-09  8:05   ` Gleb Natapov
2013-04-09  8:55     ` Zhang, Yang Z

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