From mboxrd@z Thu Jan 1 00:00:00 1970 From: Catalin Marinas Subject: Re: [PATCH v3 24/32] arm64: KVM: 32bit GP register access Date: Tue, 7 May 2013 17:33:03 +0100 Message-ID: <20130507163303.GH29757@arm.com> References: <1365437854-30214-1-git-send-email-marc.zyngier@arm.com> <1365437854-30214-25-git-send-email-marc.zyngier@arm.com> <20130502160906.GI20730@arm.com> <51892B90.8060706@arm.com> Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Cc: "linux-arm-kernel@lists.infradead.org" , "kvmarm@lists.cs.columbia.edu" , "kvm@vger.kernel.org" , Will Deacon , Christopher Covington To: Marc Zyngier Return-path: Received: from fw-tnat.cambridge.arm.com ([217.140.96.21]:59424 "EHLO cam-smtp0.cambridge.arm.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1755558Ab3EGQdq (ORCPT ); Tue, 7 May 2013 12:33:46 -0400 Content-Disposition: inline In-Reply-To: <51892B90.8060706@arm.com> Sender: kvm-owner@vger.kernel.org List-ID: On Tue, May 07, 2013 at 05:28:00PM +0100, Marc Zyngier wrote: > On 02/05/13 17:09, Catalin Marinas wrote: > > BTW, on arch/arm it looks like this is used when you get a data abort > > with PC as the destination register and you inject a prefetch abort in > > this case. Why isn't this a normal data abort? Once you get the > > information, you load it into PC but first you need to sort out the data > > abort (unless I don't understand how the kvm_inject_pabt works). > > Indeed, it should be a data abort, as we correctly fetched the > instruction. Now, I wonder why we even bother trying to catch this case. > Fetching PC from MMIO looks quite silly, but I don't think anything > really forbids it in the architecture. It's not forbidden and you should just treat it as any other data abort, no need to check whether the register is PC. If you do the PC adjustment further down in that function it will be overridden by the instruction emulation anyway. There is no optimisation in checking for PC since such fault is very unlikely in sane code anyway. -- Catalin