IA32_FEATURE_CONTROL MSR in nested virt

IA32_FEATURE_CONTROL MSR in nested virt

[Arthur Chunqi Li]

Hi Gleb and Paolo,
When I write test cases for nested virt and found that reading/writing
 IA32_FEATURE_CONTROL will be simply ignored or return 0 (in
arch/x86/kvm/vmx.c) in VM. Checking this MSR will be done by some
hypervisors (e.g. NOVA) and may cause error then, so it is necessary
to behave right when read/write it in VM.

Are there any difficulties to handle this MSR? I have two solutions.
The first one is return the value of physical CPU's and always return
true when write. This is simple but may behave as if it is a VM
because write to it after VMXON will not return GP exception. This
solution can solve most basic problems since this MSR is not commonly
used. Another solution is adding a field in VCPU to handle this MSR.
This is a complex but better method.

I think I can complete this if needed.

Thanks,
Arthur

--
Arthur Chunqi Li
Department of Computer Science
School of EECS
Peking University
Beijing, China

Re: IA32_FEATURE_CONTROL MSR in nested virt

[Paolo Bonzini]

Il 03/07/2013 10:24, Arthur Chunqi Li ha scritto:
> Hi Gleb and Paolo,
> When I write test cases for nested virt and found that reading/writing
>  IA32_FEATURE_CONTROL will be simply ignored or return 0 (in
> arch/x86/kvm/vmx.c) in VM. Checking this MSR will be done by some
> hypervisors (e.g. NOVA) and may cause error then, so it is necessary
> to behave right when read/write it in VM.
> 
> Are there any difficulties to handle this MSR? I have two solutions.
> The first one is return the value of physical CPU's and always return
> true when write. This is simple but may behave as if it is a VM
> because write to it after VMXON will not return GP exception. This
> solution can solve most basic problems since this MSR is not commonly
> used. Another solution is adding a field in VCPU to handle this MSR.
> This is a complex but better method.
> 
> I think I can complete this if needed.

Would it be enough to return 5 (binary 101) on reads if nested VMX is
enabled, and #GP on writes?

Paolo

RE: IA32_FEATURE_CONTROL MSR in nested virt

[Zhang, Yang Z]

>Il 03/07/2013 10:24, Arthur Chunqi Li ha scritto:
>> Hi Gleb and Paolo,
>> When I write test cases for nested virt and found that reading/writing  
>> IA32_FEATURE_CONTROL will be simply ignored or return 0 (in
>> arch/x86/kvm/vmx.c) in VM. Checking this MSR will be done by some 
>> hypervisors (e.g. NOVA) and may cause error then, so it is necessary 
>> to behave right when read/write it in VM.
>> 
> >Are there any difficulties to handle this MSR? I have two solutions.
> >The first one is return the value of physical CPU's and always return 
> >true when write. This is simple but may behave as if it is a VM 
> >because write to it after VMXON will not return GP exception. This 
> >solution can solve most basic problems since this MSR is not commonly 
> >used. Another solution is adding a field in VCPU to handle this MSR.
> >This is a complex but better method.
> >
> >I think I can complete this if needed.
>
>Would it be enough to return 5 (binary 101) on reads if nested VMX is enabled, and #GP on writes?
Agree!, It should be enough. You cannot return physical value directly since there is no SMX in nested.

Best regards,
Yang

Re: IA32_FEATURE_CONTROL MSR in nested virt

[Paolo Bonzini]

Il 03/07/2013 10:46, Zhang, Yang Z ha scritto:
> 
>> Il 03/07/2013 10:24, Arthur Chunqi Li ha scritto:
>>> Hi Gleb and Paolo,
>>> When I write test cases for nested virt and found that reading/writing  
>>> IA32_FEATURE_CONTROL will be simply ignored or return 0 (in
>>> arch/x86/kvm/vmx.c) in VM. Checking this MSR will be done by some 
>>> hypervisors (e.g. NOVA) and may cause error then, so it is necessary 
>>> to behave right when read/write it in VM.
>>>
>>> Are there any difficulties to handle this MSR? I have two solutions.
>>> The first one is return the value of physical CPU's and always return 
>>> true when write. This is simple but may behave as if it is a VM 
>>> because write to it after VMXON will not return GP exception. This 
>>> solution can solve most basic problems since this MSR is not commonly 
>>> used. Another solution is adding a field in VCPU to handle this MSR.
>>> This is a complex but better method.
>>>
>>> I think I can complete this if needed.
>>
>> Would it be enough to return 5 (binary 101) on reads if nested VMX is enabled, and #GP on writes?
> Agree!, It should be enough. You cannot return physical value directly since there is no SMX in nested.

Arthur, are you writing a patch?

Paolo

Re: IA32_FEATURE_CONTROL MSR in nested virt

[Gleb Natapov]

On Wed, Jul 03, 2013 at 04:24:33PM +0800, Arthur Chunqi Li wrote:
> Hi Gleb and Paolo,
> When I write test cases for nested virt and found that reading/writing
>  IA32_FEATURE_CONTROL will be simply ignored or return 0 (in
> arch/x86/kvm/vmx.c) in VM. Checking this MSR will be done by some
> hypervisors (e.g. NOVA) and may cause error then, so it is necessary
> to behave right when read/write it in VM.
> 
NOVA cannot write to it and expect anything but #GP since BIOSes usually
lock the MSR. So I agree with Paolo about returning 5 on read and #GP on
write. Later we can implement locking functionality and make BIOS
enable/disable nested vmx.

> Are there any difficulties to handle this MSR? I have two solutions.
> The first one is return the value of physical CPU's and always return
> true when write. This is simple but may behave as if it is a VM
> because write to it after VMXON will not return GP exception. This
> solution can solve most basic problems since this MSR is not commonly
> used. Another solution is adding a field in VCPU to handle this MSR.
> This is a complex but better method.
> 
> I think I can complete this if needed.
> 
> Thanks,
> Arthur
> 
> --
> Arthur Chunqi Li
> Department of Computer Science
> School of EECS
> Peking University
> Beijing, China

--
			Gleb.

Re: IA32_FEATURE_CONTROL MSR in nested virt

[Gmail]

OK, I will write a patch as what Paolo says. Anything else need to be taken into consideration, Paolo?

Arthur Chunqi Li
Department of Computer Science
School of EECS
Peking University
Beijing, China

From my iPhone

在 2013-7-3，17:14，Gleb Natapov <gleb@redhat.com> 写道：

> On Wed, Jul 03, 2013 at 04:24:33PM +0800, Arthur Chunqi Li wrote:
>> Hi Gleb and Paolo,
>> When I write test cases for nested virt and found that reading/writing
>> IA32_FEATURE_CONTROL will be simply ignored or return 0 (in
>> arch/x86/kvm/vmx.c) in VM. Checking this MSR will be done by some
>> hypervisors (e.g. NOVA) and may cause error then, so it is necessary
>> to behave right when read/write it in VM.
> NOVA cannot write to it and expect anything but #GP since BIOSes usually
> lock the MSR. So I agree with Paolo about returning 5 on read and #GP on
> write. Later we can implement locking functionality and make BIOS
> enable/disable nested vmx.
> 
>> Are there any difficulties to handle this MSR? I have two solutions.
>> The first one is return the value of physical CPU's and always return
>> true when write. This is simple but may behave as if it is a VM
>> because write to it after VMXON will not return GP exception. This
>> solution can solve most basic problems since this MSR is not commonly
>> used. Another solution is adding a field in VCPU to handle this MSR.
>> This is a complex but better method.
>> 
>> I think I can complete this if needed.
>> 
>> Thanks,
>> Arthur
>> 
>> --
>> Arthur Chunqi Li
>> Department of Computer Science
>> School of EECS
>> Peking University
>> Beijing, China
> 
> --
>            Gleb.

Re: IA32_FEATURE_CONTROL MSR in nested virt

[Bandan Das]

Gleb Natapov <gleb@redhat.com> writes:

> On Wed, Jul 03, 2013 at 04:24:33PM +0800, Arthur Chunqi Li wrote:
>> Hi Gleb and Paolo,
>> When I write test cases for nested virt and found that reading/writing
>>  IA32_FEATURE_CONTROL will be simply ignored or return 0 (in
>> arch/x86/kvm/vmx.c) in VM. Checking this MSR will be done by some
>> hypervisors (e.g. NOVA) and may cause error then, so it is necessary
>> to behave right when read/write it in VM.
>> 
> NOVA cannot write to it and expect anything but #GP since BIOSes usually
> lock the MSR. So I agree with Paolo about returning 5 on read and #GP on
> write. Later we can implement locking functionality and make BIOS
> enable/disable nested vmx.

I vaguely recalled Nadav had posted a patch related to this MSR a
while back and found this :

http://permalink.gmane.org/gmane.comp.emulators.kvm.devel/88478

Shouldn't this work ?

>> Are there any difficulties to handle this MSR? I have two solutions.
>> The first one is return the value of physical CPU's and always return
>> true when write. This is simple but may behave as if it is a VM
>> because write to it after VMXON will not return GP exception. This
>> solution can solve most basic problems since this MSR is not commonly
>> used. Another solution is adding a field in VCPU to handle this MSR.
>> This is a complex but better method.
>> 
>> I think I can complete this if needed.
>> 
>> Thanks,
>> Arthur
>> 
>> --
>> Arthur Chunqi Li
>> Department of Computer Science
>> School of EECS
>> Peking University
>> Beijing, China
>
> --
> 			Gleb.
> --
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Re: IA32_FEATURE_CONTROL MSR in nested virt

[Gleb Natapov]

On Wed, Jul 03, 2013 at 10:48:33AM -0400, Bandan Das wrote:
> Gleb Natapov <gleb@redhat.com> writes:
> 
> > On Wed, Jul 03, 2013 at 04:24:33PM +0800, Arthur Chunqi Li wrote:
> >> Hi Gleb and Paolo,
> >> When I write test cases for nested virt and found that reading/writing
> >>  IA32_FEATURE_CONTROL will be simply ignored or return 0 (in
> >> arch/x86/kvm/vmx.c) in VM. Checking this MSR will be done by some
> >> hypervisors (e.g. NOVA) and may cause error then, so it is necessary
> >> to behave right when read/write it in VM.
> >> 
> > NOVA cannot write to it and expect anything but #GP since BIOSes usually
> > lock the MSR. So I agree with Paolo about returning 5 on read and #GP on
> > write. Later we can implement locking functionality and make BIOS
> > enable/disable nested vmx.
> 
> I vaguely recalled Nadav had posted a patch related to this MSR a
> while back and found this :
> 
> http://permalink.gmane.org/gmane.comp.emulators.kvm.devel/88478
> 
> Shouldn't this work ?
> 
It should, but it needs additional Seabios patch to enabled vmx. Also
the patch is incorrectly resets MSR on SIPI. There is no point in lock
bit if it can be reset by SIPI.

> >> Are there any difficulties to handle this MSR? I have two solutions.
> >> The first one is return the value of physical CPU's and always return
> >> true when write. This is simple but may behave as if it is a VM
> >> because write to it after VMXON will not return GP exception. This
> >> solution can solve most basic problems since this MSR is not commonly
> >> used. Another solution is adding a field in VCPU to handle this MSR.
> >> This is a complex but better method.
> >> 
> >> I think I can complete this if needed.
> >> 
> >> Thanks,
> >> Arthur
> >> 
> >> --
> >> Arthur Chunqi Li
> >> Department of Computer Science
> >> School of EECS
> >> Peking University
> >> Beijing, China
> >
> > --
> > 			Gleb.
> > --
> > To unsubscribe from this list: send the line "unsubscribe kvm" in
> > the body of a message to majordomo@vger.kernel.org
> > More majordomo info at  http://vger.kernel.org/majordomo-info.html

--
			Gleb.