From mboxrd@z Thu Jan 1 00:00:00 1970 From: Paul Mackerras Subject: Re: [RFC PATCH 06/10] KVM: PPC: Book3S HV: Implement architecture compatibility modes for POWER8 Date: Tue, 5 Nov 2013 14:53:10 +1100 Message-ID: <20131105035310.GA2832@drongo> References: <20130906034820.GM29710@iris.ozlabs.ibm.com> <20130906035516.GS29710@iris.ozlabs.ibm.com> <48962332-D849-4143-AE2C-7F799A74D1A5@suse.de> Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Cc: kvm-ppc@vger.kernel.org, "kvm@vger.kernel.org mailing list" To: Alexander Graf Return-path: Content-Disposition: inline In-Reply-To: <48962332-D849-4143-AE2C-7F799A74D1A5@suse.de> Sender: kvm-ppc-owner@vger.kernel.org List-Id: kvm.vger.kernel.org On Mon, Nov 04, 2013 at 01:53:36PM +0100, Alexander Graf wrote: > > On 06.09.2013, at 05:55, Paul Mackerras wrote: > > > This allows us to select architecture 2.05 (POWER6) or 2.06 (POWER7) > > compatibility modes on a POWER8 processor. > > > > Signed-off-by: Paul Mackerras > > --- > > arch/powerpc/include/asm/reg.h | 2 ++ > > arch/powerpc/kvm/book3s_hv.c | 16 +++++++++++++++- > > 2 files changed, 17 insertions(+), 1 deletion(-) > > > > diff --git a/arch/powerpc/include/asm/reg.h b/arch/powerpc/include/asm/reg.h > > index 4ca8b85..483e0a2 100644 > > --- a/arch/powerpc/include/asm/reg.h > > +++ b/arch/powerpc/include/asm/reg.h > > @@ -315,6 +315,8 @@ > > #define SPRN_PCR 0x152 /* Processor compatibility register */ > > #define PCR_VEC_DIS (1ul << (63-0)) /* Vec. disable (pre POWER8) */ > > #define PCR_VSX_DIS (1ul << (63-1)) /* VSX disable (pre POWER8) */ > > +#define PCR_TM_DIS (1ul << (63-2)) /* Trans. memory disable (POWER8) */ > > Is this going to get used? Perhaps not, but I thought it worthwhile to document that the bit exists. Paul.