Re: linux 3.13 guest crash with -cpu host

Michael S. Tsirkin
2014-02-03T14:41:05Z

On Mon, Feb 03, 2014 at 03:26:42PM +0100, Peter Zijlstra wrote:
> On Mon, Feb 03, 2014 at 03:19:18PM +0100, Paolo Bonzini wrote:
> > Il 03/02/2014 15:12, Peter Zijlstra ha scritto:
> > >>> But why doesn't it crash on baremetal?
> > >>> Probably baremetal simply returns 0 or something.
> > >>> Let me try ..
> > >The claim "v2 and above have FEATURE_PDCM" is in fact true for real
> > >hardware.
> > >
> > >If it didn't the rdmsr() would have generated an exception and we'd have
> > >crashed just like your virtual thingy did.
> >
> > Right, and the virt thingy has no PEBS, so there is no correct value that we
> > could return from the MSR. That's why the CPUID bit is zero.
>
> There's more than PEBS in there, there's also the LBR format (which you
> obviously also don't have) and the full_width_write bit, which you also
> don't have.
>
> Returning 0 is a safe value. Seeing you don't have LBR, we don't look at
> the LBR format fields, seeing you don't have PEBS, we don't look at
> those fields either.
>
> We don't appear to use the SMM_FREEZE bit at all, and 0 is in fact the
> right value for full_width_write, since you lack the MSRs to support
> that.
>
> Anyway, its easy for me to make future kernels do the right PDCM test,
> probably easy to backport too (should apply with minimal trouble back a
> fair number of releases).
>
> You can also implement the MSR to simply return 0, which is a safe
> value.

OK, I'm testing the following now:

--->
Subject: [PATCH] kvm: emulate MSR_IA32_PERF_CAPABILITIES

guests expect that this does not crash if version > 1.

Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
---
arch/x86/kvm/x86.c | 3 +++
1 file changed, 3 insertions(+)

diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c
index 5d004da..eaf5016 100644
--- a/arch/x86/kvm/x86.c
+++ b/arch/x86/kvm/x86.c
@@ -2407,6 +2407,9 @@ int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
/* CPU multiplier */
data |= (((uint64_t)4ULL) << 40);
break;
+ case MSR_IA32_PERF_CAPABILITIES:
+ data = 0;
+ break;
case MSR_EFER:
data = vcpu->arch.efer;
break;
--
MST