From: Marcelo Tosatti <mtosatti@redhat.com>
To: "H. Peter Anvin" <hpa@zytor.com>
Cc: Nadav Amit <namit@cs.technion.ac.il>,
gleb@kernel.org, pbonzini@redhat.com, tglx@linutronix.de,
mingo@redhat.com, x86@kernel.org, kvm@vger.kernel.org,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH] KVM: x86: Fix page-tables reserved bits
Date: Wed, 16 Apr 2014 19:04:09 -0300 [thread overview]
Message-ID: <20140416220409.GB15155@amt.cnet> (raw)
In-Reply-To: <534EF354.3090204@zytor.com>
On Wed, Apr 16, 2014 at 02:17:08PM -0700, H. Peter Anvin wrote:
> On 04/16/2014 12:03 PM, Marcelo Tosatti wrote:
> >> @@ -3550,9 +3550,9 @@ static void reset_rsvds_bits_mask(struct kvm_vcpu *vcpu,
> >> break;
> >> case PT64_ROOT_LEVEL:
> >> context->rsvd_bits_mask[0][3] = exb_bit_rsvd |
> >> - rsvd_bits(maxphyaddr, 51) | rsvd_bits(7, 8);
> >> + rsvd_bits(maxphyaddr, 51) | rsvd_bits(7, 7);
> >> context->rsvd_bits_mask[0][2] = exb_bit_rsvd |
> >> - rsvd_bits(maxphyaddr, 51) | rsvd_bits(7, 8);
> >> + rsvd_bits(maxphyaddr, 51) | rsvd_bits(7, 7);
> >
> > Bit 7 is not reserved either, for the PDPTE (its PageSize bit).
> >
>
> In long mode (IA-32e), bit 7 is definitely reserved.
>
> -hpa
There is a separate reserved mask for PS=1, nevermind.
next prev parent reply other threads:[~2014-04-16 22:04 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-04-04 3:31 [PATCH] KVM: x86: Fix page-tables reserved bits Nadav Amit
2014-04-16 19:03 ` Marcelo Tosatti
2014-04-16 21:17 ` H. Peter Anvin
2014-04-16 22:04 ` Marcelo Tosatti [this message]
2014-04-28 10:41 ` Paolo Bonzini
2014-04-28 12:20 ` Nadav Amit
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