From mboxrd@z Thu Jan 1 00:00:00 1970 From: Greg Kurz Subject: Re: [PATCH v3 9/9] kvmtool: virtio: enable arm/arm64 support for bi-endianness Date: Wed, 7 May 2014 14:27:21 +0200 Message-ID: <20140507142721.083fb35e@bahia.local> References: <1398363443-3764-1-git-send-email-marc.zyngier@arm.com> <1398363443-3764-10-git-send-email-marc.zyngier@arm.com> <20140506142807.GI30234@arm.com> <87mweuq0os.fsf@approximate.cambridge.arm.com> <8738glq5ku.fsf@approximate.cambridge.arm.com> <20140507124054.680a26fb@bahia.local> <87ha51onna.fsf@approximate.cambridge.arm.com> Mime-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit Cc: Marc Zyngier , Will Deacon , Pekka Enberg , "kvmarm@lists.cs.columbia.edu" , "kvm@vger.kernel.org" , "agraf@suse.de" To: Peter Maydell Return-path: Received: from e06smtp11.uk.ibm.com ([195.75.94.107]:39155 "EHLO e06smtp11.uk.ibm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750933AbaEGM1b (ORCPT ); Wed, 7 May 2014 08:27:31 -0400 Received: from /spool/local by e06smtp11.uk.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! Violators will be prosecuted for from ; Wed, 7 May 2014 13:27:30 +0100 Received: from b06cxnps3074.portsmouth.uk.ibm.com (d06relay09.portsmouth.uk.ibm.com [9.149.109.194]) by d06dlp03.portsmouth.uk.ibm.com (Postfix) with ESMTP id 878E31B0805F for ; Wed, 7 May 2014 13:27:38 +0100 (BST) Received: from d06av11.portsmouth.uk.ibm.com (d06av11.portsmouth.uk.ibm.com [9.149.37.252]) by b06cxnps3074.portsmouth.uk.ibm.com (8.13.8/8.13.8/NCO v10.0) with ESMTP id s47CRRf1590084 for ; Wed, 7 May 2014 12:27:27 GMT Received: from d06av11.portsmouth.uk.ibm.com (localhost [127.0.0.1]) by d06av11.portsmouth.uk.ibm.com (8.14.4/8.14.4/NCO v10.0 AVout) with ESMTP id s47CRQFd005913 for ; Wed, 7 May 2014 06:27:26 -0600 In-Reply-To: Sender: kvm-owner@vger.kernel.org List-ID: On Wed, 7 May 2014 13:17:51 +0100 Peter Maydell wrote: > On 7 May 2014 12:04, Marc Zyngier wrote: > > On Wed, May 07 2014 at 11:40:54 am BST, Greg Kurz wrote: > >> All the fuzz is not really about enforcing kernel access... PPC also > >> has a current endianness selector (MSR_LE) but it only makes sense > >> if you are in the cpu context. Initial versions of the virtio biendian > >> support for QEMU PPC64 used an arbitrary cpu: in this case, the > >> only sensible thing to look at to support kernel based virtio is the > >> interrupt endianness selector (LPCR_ILE), because if gives a safe > >> hint of the kernel endianness. > >> > >> The patch set has evolved and now uses current_cpu at device reset time. > >> As a consequence, we are not necessarily tied to the kernel LPCR_ILE > >> selector I guess. > > Ah yes, I'd forgotten the history behind why we ended up looking > at interrupt endianness. > > > That makes a lot of sense, thanks for explaining that. You're basically > > doing the exact same thing we do with kvmtool on ARM. So if we have > > similar architectural features on both sides, why don't we support both > > kernel and userspace access? > > I don't think that we really need to get into whether userspace > access is or is not a good idea -- "endianness of the CPU which > does the virtio reset at the point when it does that reset" is a > nice simple rule that should generalise across architectures, > so why make it more complicated than that? > > thanks > -- PMM > I am convinced... and feeling a bit guilty for all the noise ;) I'll come with a new virtio patch set for QEMU that does just what you say. -- Gregory Kurz kurzgreg@fr.ibm.com gkurz@linux.vnet.ibm.com Software Engineer @ IBM/Meiosys http://www.ibm.com Tel +33 (0)562 165 496 "Anarchy is about taking complete responsibility for yourself." Alan Moore.