From mboxrd@z Thu Jan 1 00:00:00 1970 From: Andreas Herrmann Subject: Re: [PATCH 06/15] MIPS: Add minimal support for OCTEON3 to c-r4k.c Date: Wed, 21 May 2014 23:02:12 +0200 Message-ID: <20140521210212.GH11800@alberich> References: <1400597236-11352-1-git-send-email-andreas.herrmann@caviumnetworks.com> <1400597236-11352-7-git-send-email-andreas.herrmann@caviumnetworks.com> <20140521124041.GP10287@linux-mips.org> Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8" Cc: , David Daney , James Hogan , , David Daney To: Ralf Baechle Return-path: Received: from mail-bl2lp0208.outbound.protection.outlook.com ([207.46.163.208]:37063 "EHLO na01-bl2-obe.outbound.protection.outlook.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1752713AbaEUVEA (ORCPT ); Wed, 21 May 2014 17:04:00 -0400 Content-Disposition: inline In-Reply-To: <20140521124041.GP10287@linux-mips.org> Sender: kvm-owner@vger.kernel.org List-ID: On Wed, May 21, 2014 at 02:40:41PM +0200, Ralf Baechle wrote: > On Tue, May 20, 2014 at 04:47:07PM +0200, Andreas Herrmann wrote: > > > +static inline void r4k_blast_dcache_page_dc128(unsigned long addr) > > +{ > > + R4600_HIT_CACHEOP_WAR_IMPL; > > The R4600 has 32 byte cache lines that is this line will never be > executed on an R4600 thus can be dropped. So the line can also be removed from r4k_blast_dcache_page_dc64? > > + blast_dcache128_page(addr); > > +} > > + > > static void r4k_blast_dcache_page_setup(void) > > { > > unsigned long dc_lsize = cpu_dcache_line_size(); > > @@ -121,6 +127,8 @@ static void r4k_blast_dcache_page_setup(void) > > r4k_blast_dcache_page = r4k_blast_dcache_page_dc32; > > else if (dc_lsize == 64) > > r4k_blast_dcache_page = r4k_blast_dcache_page_dc64; > > + else if (dc_lsize == 128) > > + r4k_blast_dcache_page = r4k_blast_dcache_page_dc128; > > > For another patch - let's see if this can be turned into a switch > construct which hopefully is more readable and produces just as > afficient code with reasonable vintage of gcc. Ok. Andreas