From mboxrd@z Thu Jan  1 00:00:00 1970
From: Andi Kleen <andi@firstfloor.org>
Subject: Re: [PATCH V2 2/3] perf protect LBR when Intel PT is enabled.
Date: Thu, 3 Jul 2014 04:44:20 +0200
Message-ID: <20140703024420.GO5714@two.firstfloor.org>
References: <1404324855-15166-1-git-send-email-kan.liang@intel.com>
 <1404324855-15166-2-git-send-email-kan.liang@intel.com>
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On Wed, Jul 02, 2014 at 11:14:14AM -0700, kan.liang@intel.com wrote:
> From: Kan Liang <kan.liang@intel.com>
> 
> If RTIT_CTL.TraceEn=1, any attempt to read or write the LBR or LER MSRs, including LBR_TOS, will result in a #GP.
> Since Intel PT can be enabled/disabled at runtime, LBR MSRs have to be protected by _safe() at runtime.
> 
> Signed-off-by: Kan Liang <kan.liang@intel.com>

Patch looks good to me.

-Andi