Re: [PATCH V2 2/3] perf protect LBR when Intel PT is enabled.

[Peter Zijlstra <peterz@infradead.org>]

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On Mon, Jul 07, 2014 at 05:46:35PM +0200, Peter Zijlstra wrote:
> On Mon, Jul 07, 2014 at 01:57:16PM +0000, Liang, Kan wrote:
> > > > This doesn't work, e.g. hardware debuggers can take over at any time.
> > > 
> > > Tough cookies. Hardware debuggers get to deal with whatever crap they
> > > cause.
> > 
> > If so, I think I may discard this patch (2/3). I will resubmit the
> > other two patches as a patch set to only handle the KVM issue we
> > found.  It checks the access of LBR and extra MSRs at the
> > initialization time and set the flags. So we just need to check the
> > flags at runtime and avoid the protection by _safe(). 
> 
> Right.
> 
> > For Intel PT and LBR handling, since the PT codes haven't been
> > integrated yet, I will try to implement another patch later.  The
> > patch will add flags for LBR and PT.  When enabling PT, it checks LBR
> > flag and update the PT flag. When enabling LBR, it checks PT flag and
> > update the LBR flag. When disabling LBR/PT, we just update the related
> > flags. we don't need to add _safe or extra rmsr in fast path. 
> 
> Yeah, should be part of the PT patches.
> 
> > How do you think?
> 
> With my brain, much like all primates :-)

Also, teach your mailer to wrap text at 78 chars or so.

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