From mboxrd@z Thu Jan 1 00:00:00 1970 From: Andrew Jones Subject: Re: [PATCH kvm-unit-tests] arm: fix crash when caches are off Date: Tue, 16 Sep 2014 20:04:31 +0200 Message-ID: <20140916180431.GA29644@hawk.usersys.redhat.com> References: <1410833175-25547-1-git-send-email-drjones@redhat.com> <5417F159.1050501@redhat.com> <198129286.4990140.1410869523048.JavaMail.zimbra@redhat.com> <54182D09.9000700@redhat.com> <1003075385.5021814.1410871383104.JavaMail.zimbra@redhat.com> <5418315B.6020201@redhat.com> <205961557.5030289.1410871866191.JavaMail.zimbra@redhat.com> <1556974167.5139155.1410878291652.JavaMail.zimbra@redhat.com> Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Cc: kvmarm@lists.cs.columbia.edu, kvm@vger.kernel.org To: Paolo Bonzini Return-path: Received: from mx1.redhat.com ([209.132.183.28]:4108 "EHLO mx1.redhat.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754742AbaIPSEi (ORCPT ); Tue, 16 Sep 2014 14:04:38 -0400 Content-Disposition: inline In-Reply-To: <1556974167.5139155.1410878291652.JavaMail.zimbra@redhat.com> Sender: kvm-owner@vger.kernel.org List-ID: On Tue, Sep 16, 2014 at 10:38:11AM -0400, Andrew Jones wrote: > > > ----- Original Message ----- > > > > > > ----- Original Message ----- > > > Il 16/09/2014 14:43, Andrew Jones ha scritto: > > > > I don't think we need to worry about this case. AFAIU, enabling the > > > > caches for a particular cpu shouldn't require any synchronization. > > > > So we should be able to do > > > > > > > > enable caches > > > > spin_lock > > > > start other processors > > > > spin_unlock > > > > > > Ok, I'll test and apply your patch then. > > > > Actually, yeah, please apply now in order to get A7 boards working. > > I'll do a follow-on patch to fix the case above (which will require > > deciding how to hand per cpu data). > > Post coffee, I don't see why I shouldn't just use SCTLR.C as my > boolean, which is of course per cpu, and means the same thing, > i.e. caches enabled or not. I'll send a v2 that drops > mem_caches_enabled, and modifies the logic of the spin_lock asm. Scratch this idea. It breaks the use of spin_lock from usr mode. I think plan B is the best, which is; apply this patch, and then I'll make mem_caches_enabled per cpu later, once we support per cpu data. > > > > > > > > Once you change the code to enable caches, please consider hanging on > > > spin_lock with caches disabled. > > > > > > Paolo > > > -- > > > To unsubscribe from this list: send the line "unsubscribe kvm" in > > > the body of a message to majordomo@vger.kernel.org > > > More majordomo info at http://vger.kernel.org/majordomo-info.html > > > > > _______________________________________________ > > kvmarm mailing list > > kvmarm@lists.cs.columbia.edu > > https://lists.cs.columbia.edu/mailman/listinfo/kvmarm > >