From mboxrd@z Thu Jan 1 00:00:00 1970 From: Will Deacon Subject: Re: [PATCHv7 01/26] iommu/arm-smmu: change IOMMU_EXEC to IOMMU_NOEXEC Date: Tue, 23 Sep 2014 15:58:16 +0100 Message-ID: <20140923145816.GE28608@arm.com> References: <1411483586-29304-1-git-send-email-a.motakis@virtualopensystems.com> <1411483586-29304-2-git-send-email-a.motakis@virtualopensystems.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Cc: Shuah Khan , "kvm-u79uwXL29TY76Z2rM5mHXA@public.gmane.org" , "eric.auger-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org" , Marc Zyngier , Greg Kroah-Hartman , "iommu-cunTk1MwBs9QetFLy7KEm3xJsTq8ys+cHZ5vskTnxNA@public.gmane.org" , open list , Thierry Reding , Alexey Kardashevskiy , "moderated list:ARM SMMU DRIVER" , "tech-lrHrjnjw1UfHK3s98zE1ajGjJy/sRE9J@public.gmane.org" , "kvmarm-FPEHb7Xf0XXUo1n7N8X6UoWGPAHP3yOg@public.gmane.org" , "christoffer.dall-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org" To: Antonios Motakis Return-path: Content-Disposition: inline In-Reply-To: <1411483586-29304-2-git-send-email-a.motakis-lrHrjnjw1UfHK3s98zE1ajGjJy/sRE9J@public.gmane.org> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: iommu-bounces-cunTk1MwBs9QetFLy7KEm3xJsTq8ys+cHZ5vskTnxNA@public.gmane.org Errors-To: iommu-bounces-cunTk1MwBs9QetFLy7KEm3xJsTq8ys+cHZ5vskTnxNA@public.gmane.org List-Id: kvm.vger.kernel.org Hi Antonios, On Tue, Sep 23, 2014 at 03:46:00PM +0100, Antonios Motakis wrote: > Exposing the XN flag of the SMMU driver as IOMMU_NOEXEC instead of > IOMMU_EXEC makes it enforceable, since for IOMMUs that don't support > the XN flag pages will always be executable. > > Signed-off-by: Antonios Motakis > --- > drivers/iommu/arm-smmu.c | 9 +++++---- > include/linux/iommu.h | 2 +- > 2 files changed, 6 insertions(+), 5 deletions(-) [...] > diff --git a/include/linux/iommu.h b/include/linux/iommu.h > index 20f9a52..e1a644c 100644 > --- a/include/linux/iommu.h > +++ b/include/linux/iommu.h > @@ -27,7 +27,7 @@ > #define IOMMU_READ (1 << 0) > #define IOMMU_WRITE (1 << 1) > #define IOMMU_CACHE (1 << 2) /* DMA cache coherency */ > -#define IOMMU_EXEC (1 << 3) > +#define IOMMU_NOEXEC (1 << 3) This hunk needs to be a separate patch merged by Joerg before I can take the arm-smmu part (which looks fine). Will