From mboxrd@z Thu Jan 1 00:00:00 1970 From: Gleb Natapov Subject: Re: Seeking a KVM benchmark Date: Wed, 12 Nov 2014 17:22:04 +0200 Message-ID: <20141112152204.GC26187@minantech.com> References: <20141109085238.GA26187@minantech.com> <54608D77.2090907@redhat.com> <20141110104531.GB26187@minantech.com> <5460AC7C.8040409@redhat.com> <5460CA71.2050701@gmail.com> <5460F5B9.8030902@redhat.com> <20141110173835.GA26770@minantech.com> <5463458C.2070000@redhat.com> Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Cc: Avi Kivity , Andy Lutomirski , kvm list To: Paolo Bonzini Return-path: Received: from mail-wi0-f176.google.com ([209.85.212.176]:44998 "EHLO mail-wi0-f176.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752620AbaKLPWJ (ORCPT ); Wed, 12 Nov 2014 10:22:09 -0500 Received: by mail-wi0-f176.google.com with SMTP id h11so5246097wiw.3 for ; Wed, 12 Nov 2014 07:22:08 -0800 (PST) Content-Disposition: inline In-Reply-To: <5463458C.2070000@redhat.com> Sender: kvm-owner@vger.kernel.org List-ID: On Wed, Nov 12, 2014 at 12:33:32PM +0100, Paolo Bonzini wrote: > > > On 10/11/2014 18:38, Gleb Natapov wrote: > > On Mon, Nov 10, 2014 at 06:28:25PM +0100, Paolo Bonzini wrote: > >> On 10/11/2014 15:23, Avi Kivity wrote: > >>> It's not surprising [1]. Since the meaning of some PTE bits change [2], > >>> the TLB has to be flushed. In VMX we have VPIDs, so we only need to flush > >>> if EFER changed between two invocations of the same VPID, which isn't the > >>> case. > >>> > >>> [1] after the fact > >>> [2] although those bits were reserved with NXE=0, so they shouldn't have > >>> any TLB footprint > >> > >> You're right that this is not that surprising after the fact, and that > >> both Sandy Bridge and Ivy Bridge have VPIDs (even the non-Xeon ones). > >> This is also why I'm curious about the Nehalem. > >> > >> However note that even toggling the SCE bit is flushing the TLB. The > >> NXE bit is not being toggled here! That's the more surprising part. > >> > > Just a guess, but may be because writing EFER is not something that happens > > often in regular OSes it is not optimized to handle different bits differently. > > Yes, that's what Intel said too. > > Nehalem results: > > userspace exit, urn 17560 17726 17628 17572 17417 > lightweight exit, urn 3316 3342 3342 3319 3328 > userspace exit, LOAD_EFER, guest!=host 12200 11772 12130 12164 12327 > lightweight exit, LOAD_EFER, guest!=host 3214 3220 3238 3218 3337 > userspace exit, LOAD_EFER, guest=host 11983 11780 11920 11919 12040 > lightweight exit, LOAD_EFER, guest=host 3178 3193 3193 3187 3220 > Is this with Andy's patch that skips LOAD_EFER when guest=host, or the one that always switch LOAD_EFER? -- Gleb.