Re: [PATCH 6/9] KVM: cpuid: mask more bits in leaf 0xd and subleaves

Wanpeng Li
2014-12-05T01:20:05Z

On Fri, Dec 05, 2014 at 08:34:47AM +0800, Wanpeng Li wrote:
>Hi Paolo,
>On Thu, Dec 04, 2014 at 04:57:11PM +0100, Paolo Bonzini wrote:
>>- EAX=0Dh, ECX=1: output registers ECX/EDX are reserved.
>>
>>- EAX=0Dh, ECX>1: output register ECX bit 0 is clear for all the CPUID
>>leaves we support, because variable "supported" comes from XCR0 and not
>>XSS. Bits above 0 are reserved, so ECX is overall zero. Output register
>>EDX is reserved.
>>
>>Source: Intel Architecture Instruction Set Extensions Programming
>>Reference, ref. number 319433-022
>>
>>Reviewed-by: Radim Krčmář <rkrcmar@redhat.com>
>>Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
>>---
>> arch/x86/kvm/cpuid.c | 10 ++++++++--
>> 1 file changed, 8 insertions(+), 2 deletions(-)
>>
>
>Do you miss this in your patch?
>
>+ /* cpuid 0xD.1.eax */
>+ const u32 kvm_supported_word10_x86_features =
>+ F(XSAVEOPT) | F(XSAVEC) | F(XGETBV1);
>+
>
>In addition, there is bisect issue if this is added in this patch.
>(4/9 will take advantage of kvm_supported_word10_x86_features)

Also due to "kvm: x86: mask out XSAVES".

Regards,
Wanpeng Li

>
>Regards,
>Wanpeng Li
>
>>diff --git a/arch/x86/kvm/cpuid.c b/arch/x86/kvm/cpuid.c
>>index 2f7bc2de9915..644bfe828ce1 100644
>>--- a/arch/x86/kvm/cpuid.c
>>+++ b/arch/x86/kvm/cpuid.c
>>@@ -482,8 +482,14 @@ static inline int __do_cpuid_ent(struct kvm_cpuid_entry2 *entry, u32 function,
>> entry[i].ebx =
>> xstate_required_size(supported,
>> true);
>>- } else if (entry[i].eax == 0 || !(supported & mask))
>>- continue;
>>+ } else {
>>+ if (entry[i].eax == 0 || !(supported & mask))
>>+ continue;
>>+ if (WARN_ON_ONCE(entry[i].ecx & 1))
>>+ continue;
>>+ }
>>+ entry[i].ecx = 0;
>>+ entry[i].edx = 0;
>> entry[i].flags |=
>> KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
>> ++*nent;
>>--
>>1.8.3.1
>>
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