From mboxrd@z Thu Jan  1 00:00:00 1970
From: Radim =?utf-8?B?S3LEjW3DocWZ?= <rkrcmar@redhat.com>
Subject: Re: [PATCH] KVM: x86: nVMX: support for MSR loading/storing
Date: Tue, 9 Dec 2014 22:59:08 +0100
Message-ID: <20141209215907.GA31084@potion.brq.redhat.com>
References: <20141209211810.GA17879@gnote>
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Cc: Paolo Bonzini <pbonzini@redhat.com>, Bandan Das <bsd@redhat.com>,
	kvm@vger.kernel.org, Jan Kiszka <jan.kiszka@web.de>,
	Wincy Van <fanwenyi0529@gmail.com>
To: Eugene Korenevsky <ekorenevsky@gmail.com>
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2014-12-10 00:18+0300, Eugene Korenevsky:
> +static bool vmx_load_msr_entry_verify(struct kvm_vcpu *vcpu,
> +				      struct vmx_msr_entry *e)
[...]
> +	/* x2APIC MSR accesses are not allowed */
> +	if (apic_x2apic_mode(vcpu->arch.apic) && (e->index >> 24) == 0x800)
> +		return false;

GCC doesn't warn that "((u32)e->index >> 24) == 0x800" is always false?
I think SDM says '(e->index >> 8) == 0x8'.