From mboxrd@z Thu Jan 1 00:00:00 1970 From: Christoffer Dall Subject: Re: [PATCH 4/4] arm/arm64: KVM: use kernel mapping to perform invalidation on page fault Date: Tue, 13 Jan 2015 14:49:16 +0100 Message-ID: <20150113134916.GH26222@cbox> References: <20150111175841.GI21444@cbox> <20150111183828.GA3868@cbox> <54B39AC6.7000807@arm.com> <20150112201009.GC26222@cbox> <54B503CE.4000809@arm.com> <20150113120458.GE26222@cbox> <20150113133516.GF26222@cbox> Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Cc: Marc Zyngier , kvm-devel , "kvmarm@lists.cs.columbia.edu" To: Peter Maydell Return-path: Received: from mail-la0-f50.google.com ([209.85.215.50]:41073 "EHLO mail-la0-f50.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752446AbbAMNtS (ORCPT ); Tue, 13 Jan 2015 08:49:18 -0500 Received: by mail-la0-f50.google.com with SMTP id pn19so2655046lab.9 for ; Tue, 13 Jan 2015 05:49:16 -0800 (PST) Content-Disposition: inline In-Reply-To: Sender: kvm-owner@vger.kernel.org List-ID: On Tue, Jan 13, 2015 at 01:41:03PM +0000, Peter Maydell wrote: > On 13 January 2015 at 13:35, Christoffer Dall > wrote: > > Wouldn't a guest (and I believe Linux does this) reserve ASID 0 for > > additional cores and use ASID 1+++ for itself? > > If the guest reserves an ASID for "MMU disabled" then yes, that would > work. The question of course is whether all guests do that... > which ASID would match for MMU disabled? Did you come across that in the ARM ARM somewhere? The fact that Linux does it would indicate that this may be a requirement on real hardware too and therefore all guests have to do it... -Christoffer