From mboxrd@z Thu Jan 1 00:00:00 1970 From: Christoffer Dall Subject: Re: [PATCH] KVM: arm64: add active register handling to GICv3 emulation as well Date: Tue, 5 May 2015 13:57:07 +0200 Message-ID: <20150505115707.GA19385@cbox> References: <1429815713-13684-1-git-send-email-andre.przywara@arm.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Cc: marc.zyngier@arm.com, kvmarm@lists.cs.columbia.edu, kvm@vger.kernel.org, linux-arm-kernel@lists.infradead.org To: Andre Przywara Return-path: Content-Disposition: inline In-Reply-To: <1429815713-13684-1-git-send-email-andre.przywara@arm.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: kvmarm-bounces@lists.cs.columbia.edu Sender: kvmarm-bounces@lists.cs.columbia.edu List-Id: kvm.vger.kernel.org On Thu, Apr 23, 2015 at 08:01:53PM +0100, Andre Przywara wrote: > Commit 47a98b15ba7c ("arm/arm64: KVM: support for un-queuing active > IRQs") introduced handling of the GICD_I[SC]ACTIVER registers, > but only for the GICv2 emulation. For the sake of completeness and > as this is a pre-requisite for save/restore of the GICv3 distributor > state, we should also emulate their handling in the distributor and > redistributor frames of an emulated GICv3. > > Signed-off-by: Andre Przywara Acked-by: Christoffer Dall Applied to queue, thanks! -Christoffer