From mboxrd@z Thu Jan  1 00:00:00 1970
From: Borislav Petkov <bp@alien8.de>
Subject: Re: [PATCH] target-i386: Do not set MCG_SER_P by default
Date: Sat, 21 Nov 2015 02:09:25 +0100
Message-ID: <20151121010925.GB3994@pd.tnic>
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 <564FA8A7.3000500@suse.de>
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Cc: KVM <kvm@vger.kernel.org>, Paolo Bonzini <pbonzini@redhat.com>,
	Richard Henderson <rth@twiddle.net>,
	Eduardo Habkost <ehabkost@redhat.com>,
	Marcelo Tosatti <mtosatti@redhat.com>,
	qemu-devel <qemu-devel@nongnu.org>
To: Andreas =?utf-8?Q?F=C3=A4rber?= <afaerber@suse.de>
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On Sat, Nov 21, 2015 at 12:11:35AM +0100, Andreas F=C3=A4rber wrote:
> Hi,
>=20
> CC'ing qemu-devel.

Ah, thanks.

> Am 21.11.2015 um 00:01 schrieb Borislav Petkov:
> > From: Borislav Petkov <bp@suse.de>
> >=20
> > Software Error Recovery, i.e. SER, is purely an Intel feature and i=
t
> > shouldn't be set by default. Enable it only on Intel.
>=20
> Is this new in 2.5? Otherwise we would probably need compatibility co=
de
> in pc*.[ch] for incoming live migration from older versions.

It looks it is really old, AFAIK from 2010:

c0532a76b407 ("MCE: Relay UCR MCE to guest")

You'd need to be more verbose about pc*.[ch]. An example perhaps...?

> >          mcg_cap &=3D MCE_CAP_DEF;
> >          mcg_cap |=3D banks;
> > +
> > +	if (IS_INTEL_CPU(env))
> > +		mcg_cap |=3D MCG_SER_P;
>=20
> Tabs and missing braces.

Ok.

Thanks.

--=20
Regards/Gruss,
    Boris.

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