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From: James Hogan <james.hogan@imgtec.com>
To: Leon Alrae <leon.alrae@imgtec.com>
Cc: <qemu-devel@nongnu.org>, Paolo Bonzini <pbonzini@redhat.com>,
	<kvm@vger.kernel.org>, Aurelien Jarno <aurelien@aurel32.net>
Subject: Re: [PATCH v5 0/7] mips/kvm: Support FPU & SIMD (MSA) in MIPS KVM guests
Date: Fri, 5 Feb 2016 10:46:22 +0000	[thread overview]
Message-ID: <20160205104622.GP5038@jhogan-linux.le.imgtec.org> (raw)
In-Reply-To: <56B3221B.5030006@imgtec.com>

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On Thu, Feb 04, 2016 at 10:04:11AM +0000, Leon Alrae wrote:
> On 03/02/16 17:16, James Hogan wrote:
> > Here's a v5 refresh of my FPU/MSA patchset for v2.6. Thanks to all who
> > have taken the time to review it so far.
> > 
> > This patchset primarily adds support for FPU and MIPS SIMD Architecture
> > (MSA) in MIPS KVM guests to QEMU. It depends on Linux v4.1, specifically
> > my KVM patchset to add the corresponding hypervisor support to KVM
> > ("[PATCH 00/20] MIPS: KVM: Guest FPU & SIMD (MSA) support").
> > 
> > All comments welcome.
> > 
> > Changes in v5:
> > - Rebase on master (fixed use of uint64 in patch 5).
> > - Use restore_fp_status(env) in patch 6.
> > - Restore MSA FP state using restore_msa_fp_status(env) in patch 7
> >   (Leon).
> > 
> > Changes in v4:
> > - Rebase on master (dropped patch 1 & 2).
> > 
> > Changes in v3 (patch 6 only):
> > - Fix big endian (the pointer passed to the kernel must be for the
> >   actual 32-bit value, not a temporary 64-bit value, otherwise on big
> >   endian systems the kernel will only interpret the upper half).
> > 
> > Changes in v2:
> > - Moved most of patch 7 and updates to linux-headers/linux/kvm.h from
> >   patches 8 and 9 into a new patch 1, which is purely for reference
> >   (Paolo).
> > - Add the changes to MIPS_CP0_{32,64} macros from v1 patch 7 to patch 2,
> >   since the rest of that patch is now unnecessary and the change is
> >   along the same lines as patch 2 (not added Leon's Reviewed-by to this
> >   patch due to that non-reviewed change).
> > - Fix line wrapping of kvm_mips_get_one_reg() calls from Config4 and
> >   Config5 in patch 5 (Leon).
> > - Change (1 << x) to (1U << x) in important places in patch 5, 8 & 9 to
> >   avoid compiler undefined behaviour (Leon).
> > 
> > James Hogan (7):
> >   mips/kvm: Remove a couple of noisy DPRINTFs
> >   mips/kvm: Implement PRid CP0 register
> >   mips/kvm: Implement Config CP0 registers
> >   mips/kvm: Support unsigned KVM registers
> >   mips/kvm: Support signed 64-bit KVM registers
> >   mips/kvm: Support FPU in MIPS KVM guests
> >   mips/kvm: Support MSA in MIPS KVM guests
> > 
> >  target-mips/kvm.c | 387 ++++++++++++++++++++++++++++++++++++++++++++++++++++--
> >  1 file changed, 374 insertions(+), 13 deletions(-)
> > 
> 
> I've applied the series to my target-mips queue, thanks.

Thanks Leon!

Cheers
James

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      reply	other threads:[~2016-02-05 10:46 UTC|newest]

Thread overview: 10+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-02-03 17:16 [PATCH v5 0/7] mips/kvm: Support FPU & SIMD (MSA) in MIPS KVM guests James Hogan
2016-02-03 17:16 ` [PATCH v5 1/7] mips/kvm: Remove a couple of noisy DPRINTFs James Hogan
2016-02-03 17:16 ` [PATCH v5 2/7] mips/kvm: Implement PRid CP0 register James Hogan
2016-02-03 17:16 ` [PATCH v5 3/7] mips/kvm: Implement Config CP0 registers James Hogan
2016-02-03 17:16 ` [PATCH v5 4/7] mips/kvm: Support unsigned KVM registers James Hogan
2016-02-03 17:16 ` [PATCH v5 5/7] mips/kvm: Support signed 64-bit " James Hogan
2016-02-03 17:16 ` [PATCH v5 6/7] mips/kvm: Support FPU in MIPS KVM guests James Hogan
2016-02-03 17:16 ` [PATCH v5 7/7] mips/kvm: Support MSA " James Hogan
2016-02-04 10:04 ` [PATCH v5 0/7] mips/kvm: Support FPU & SIMD (MSA) " Leon Alrae
2016-02-05 10:46   ` James Hogan [this message]

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