From: Borislav Petkov <bp@alien8.de>
To: Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>
Cc: joro@8bytes.org, alex.williamson@redhat.com, gleb@kernel.org,
pbonzini@redhat.com, kvm@vger.kernel.org,
linux-kernel@vger.kernel.org, wei@redhat.com,
sherry.hurwitz@amd.com
Subject: Re: [PART1 RFC 4/9] KVM: x86: Detect and Initialize AVIC support
Date: Fri, 12 Feb 2016 15:13:37 +0100 [thread overview]
Message-ID: <20160212141337.GA4504@pd.tnic> (raw)
In-Reply-To: <1455285574-27892-5-git-send-email-suravee.suthikulpanit@amd.com>
On Fri, Feb 12, 2016 at 08:59:29PM +0700, Suravee Suthikulpanit wrote:
> From: Suravee Suthikulpanit <Suravee.Suthikulpanit@amd.com>
>
> This patch introduces AVIC-related data structure, and AVIC
> intitialization code.
>
> There are three main data structures for AVIC:
> * Virtual APIC (vAPIC) backing page (per-VCPU)
> * Physical APIC ID table (per-VM)
> * Logical APIC ID table (per-VM)
>
> In order to accommodate the new per-VM tables, we introduce
> a new per-VM arch-specific void pointer, struct kvm_arch.arch_data.
> This will point to the newly introduced struct svm_vm_data.
>
> This patch also introduces code to detect the new new SVM feature CPUID
> Fn8000_000A_EDX[13], which identifies support for AMD Advance Virtual
> Interrupt Controller (AVIC).
>
> Currently, AVIC is disabled by default. Users can manually
> enable AVIC via kernel boot option kvm-amd.avic=1 or during
> kvm-amd module loading with parameter avic=1.
>
> Signed-off-by: Suravee Suthikulpanit <Suravee.Suthikulpanit@amd.com>
> ---
> arch/x86/include/asm/cpufeature.h | 1 +
> arch/x86/include/asm/kvm_host.h | 2 +
> arch/x86/kernel/cpu/scattered.c | 1 +
> arch/x86/kvm/svm.c | 404 +++++++++++++++++++++++++++++++++++++-
> 4 files changed, 407 insertions(+), 1 deletion(-)
>
> diff --git a/arch/x86/include/asm/cpufeature.h b/arch/x86/include/asm/cpufeature.h
> index 7ad8c94..ee85900 100644
> --- a/arch/x86/include/asm/cpufeature.h
> +++ b/arch/x86/include/asm/cpufeature.h
> @@ -203,6 +203,7 @@
>
> #define X86_FEATURE_VMMCALL ( 8*32+15) /* Prefer vmmcall to vmcall */
> #define X86_FEATURE_XENPV ( 8*32+16) /* "" Xen paravirtual guest */
> +#define X86_FEATURE_AVIC ( 8*32+17) /* AMD Virtual Interrupt Controller support */
>
>
> /* Intel-defined CPU features, CPUID level 0x00000007:0 (ebx), word 9 */
> diff --git a/arch/x86/include/asm/kvm_host.h b/arch/x86/include/asm/kvm_host.h
> index 44adbb8..7b78328 100644
> --- a/arch/x86/include/asm/kvm_host.h
> +++ b/arch/x86/include/asm/kvm_host.h
> @@ -754,6 +754,8 @@ struct kvm_arch {
>
> bool irqchip_split;
> u8 nr_reserved_ioapic_pins;
> +
> + void *arch_data;
> };
>
> struct kvm_vm_stat {
> diff --git a/arch/x86/kernel/cpu/scattered.c b/arch/x86/kernel/cpu/scattered.c
> index 8cb57df..88cfbe7 100644
> --- a/arch/x86/kernel/cpu/scattered.c
> +++ b/arch/x86/kernel/cpu/scattered.c
> @@ -37,6 +37,7 @@ void init_scattered_cpuid_features(struct cpuinfo_x86 *c)
> { X86_FEATURE_HW_PSTATE, CR_EDX, 7, 0x80000007, 0 },
> { X86_FEATURE_CPB, CR_EDX, 9, 0x80000007, 0 },
> { X86_FEATURE_PROC_FEEDBACK, CR_EDX,11, 0x80000007, 0 },
> + { X86_FEATURE_AVIC, CR_EDX,13, 0x8000000a, 0 },
> { 0, 0, 0, 0, 0 }
> };
You need to check tip/master when/before/after touching arch/x86/:
a1ff57260818 ("x86/cpufeature: Add AMD AVIC bit")
--
Regards/Gruss,
Boris.
ECO tip #101: Trim your mails when you reply.
next prev parent reply other threads:[~2016-02-12 14:13 UTC|newest]
Thread overview: 51+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-02-12 13:59 [PART1 RFC 0/9] KVM: x86: Introduce SVM AVIC support Suravee Suthikulpanit
2016-02-12 13:59 ` [PART1 RFC 1/9] KVM: x86: Misc LAPIC changes to exposes helper functions Suravee Suthikulpanit
2016-02-12 13:59 ` [PART1 RFC 2/9] svm: Introduce new AVIC VMCB registers Suravee Suthikulpanit
2016-02-12 13:59 ` [PART1 RFC 3/9] svm: clean up V_TPR, V_IRQ, V_INTR_PRIO, and V_INTR_MASKING Suravee Suthikulpanit
2016-02-12 13:59 ` [PART1 RFC 4/9] KVM: x86: Detect and Initialize AVIC support Suravee Suthikulpanit
2016-02-12 14:13 ` Borislav Petkov [this message]
2016-02-12 15:46 ` Suravee Suthikulpanit
2016-02-12 13:59 ` [PART1 RFC 5/9] svm: Add VMEXIT handlers for AVIC Suravee Suthikulpanit
2016-02-12 15:38 ` Paolo Bonzini
2016-02-15 19:22 ` Radim Krčmář
2016-02-16 6:29 ` Suravee Suthikulpanit
2016-02-16 12:15 ` Paolo Bonzini
2016-02-16 14:13 ` Radim Krčmář
2016-02-16 16:56 ` Paolo Bonzini
2016-02-16 18:06 ` Radim Krčmář
2016-02-18 2:25 ` Suravee Suthikulpanit
2016-02-18 14:18 ` Radim Krčmář
2016-02-18 14:51 ` Paolo Bonzini
2016-02-18 15:43 ` Radim Krčmář
2016-02-18 15:53 ` Paolo Bonzini
2016-02-18 16:27 ` Radim Krčmář
2016-02-18 17:18 ` Paolo Bonzini
2016-02-19 11:39 ` Suravee Suthikulpanit
2016-02-19 11:44 ` Paolo Bonzini
2016-02-19 11:59 ` Suravee Suthikulpanit
2016-03-03 10:42 ` Suravee Suthikulpanit
2016-03-03 10:50 ` Paolo Bonzini
2016-02-19 11:32 ` Suravee Suthikulpanit
2016-02-12 13:59 ` [PART1 RFC 6/9] svm: Add interrupt injection via AVIC Suravee Suthikulpanit
2016-02-12 14:16 ` Borislav Petkov
2016-02-12 15:54 ` Suravee Suthikulpanit
2016-02-12 17:14 ` Borislav Petkov
2016-02-12 18:21 ` Paolo Bonzini
2016-02-12 18:30 ` Borislav Petkov
2016-02-12 18:56 ` Paolo Bonzini
2016-02-12 19:33 ` Borislav Petkov
2016-02-16 7:50 ` Ingo Molnar
2016-02-16 8:39 ` [PATCH] x86/msr: Document msr-index.h rule for addition Borislav Petkov
2016-02-12 15:55 ` [PART1 RFC 6/9] svm: Add interrupt injection via AVIC Paolo Bonzini
2016-02-12 16:21 ` Suravee Suthikulpanit
2016-02-12 18:19 ` Paolo Bonzini
2016-02-12 19:36 ` Suravee Suthikulpanit
2016-02-19 11:57 ` Suravee Suthikulpanit
2016-02-12 13:59 ` [PART1 RFC 7/9] svm: Do not expose x2APIC when enable AVIC Suravee Suthikulpanit
2016-02-12 13:59 ` [PART1 RFC 8/9] svm: Do not intercept CR8 " Suravee Suthikulpanit
2016-02-12 15:48 ` Paolo Bonzini
2016-02-12 13:59 ` [PART1 RFC 9/9] svm: Manage vcpu load/unload " Suravee Suthikulpanit
2016-02-12 15:46 ` Paolo Bonzini
2016-02-12 18:13 ` [PART1 RFC 0/9] KVM: x86: Introduce SVM AVIC support Paolo Bonzini
2016-02-12 19:55 ` Suravee Suthikulpanit
2016-02-12 20:05 ` Paolo Bonzini
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20160212141337.GA4504@pd.tnic \
--to=bp@alien8.de \
--cc=alex.williamson@redhat.com \
--cc=gleb@kernel.org \
--cc=joro@8bytes.org \
--cc=kvm@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=pbonzini@redhat.com \
--cc=sherry.hurwitz@amd.com \
--cc=suravee.suthikulpanit@amd.com \
--cc=wei@redhat.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).