From mboxrd@z Thu Jan 1 00:00:00 1970 From: Radim =?utf-8?B?S3LEjW3DocWZ?= Subject: Re: [PATCH] KVM: x86: disable PEBS before a guest entry Date: Fri, 4 Mar 2016 14:27:03 +0100 Message-ID: <20160304132702.GE2294@potion.brq.redhat.com> References: <1457031201-31723-1-git-send-email-rkrcmar@redhat.com> Mime-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: QUOTED-PRINTABLE Cc: "linux-kernel@vger.kernel.org" , kvm list , Paolo Bonzini , =?utf-8?B?SmnFmcOtIE9sxaFh?= , stable@vger.kernel.org To: David Matlack Return-path: Content-Disposition: inline In-Reply-To: Sender: stable-owner@vger.kernel.org List-Id: kvm.vger.kernel.org 2016-03-03 13:32-0800, David Matlack: > On Thu, Mar 3, 2016 at 10:53 AM, Radim Kr=C4=8Dm=C3=A1=C5=99 wrote: >> diff --git a/arch/x86/kvm/vmx.c b/arch/x86/kvm/vmx.c >> @@ -1767,6 +1767,13 @@ static void clear_atomic_switch_msr(struct vc= pu_vmx *vmx, unsigned msr) >> return; >> } >> break; >> + case MSR_IA32_PEBS_ENABLE: >> + /* PEBS needs a quiescent period after being disable= d (to write >> + * a record). Disabling PEBS through VMX MSR swappi= ng doesn't >> + * provide that period, so a CPU could write host's = record into >> + * guest's memory. >> + */ >> + wrmsrl(MSR_IA32_PEBS_ENABLE, 0); >=20 > Should this go in add_atomic_switch_msr instead of clear_atomic_switc= h_msr? Yes, it could be cleared in both (in case guest PEBS can be non-zero), but I wanted to have it only in add_atomic_switch_msr(). Thank you! v2 underway. (In case it makes you wonder how it was tested: I have a bad habit of trying whether a patch can be improved before posting and this one went awry, because I already returned the machine with reproducer and the change seemed simple enough.)