From mboxrd@z Thu Jan 1 00:00:00 1970 From: "Michael S. Tsirkin" Subject: Re: [PATCH v5 5/5] nvdimm acpi: add _CRS Date: Mon, 7 Mar 2016 18:19:46 +0200 Message-ID: <20160307181839-mutt-send-email-mst@redhat.com> References: <1456919441-101204-1-git-send-email-guangrong.xiao@linux.intel.com> <1456919441-101204-6-git-send-email-guangrong.xiao@linux.intel.com> <20160303152819-mutt-send-email-mst@redhat.com> <56D844AB.5060805@linux.intel.com> <20160303164730-mutt-send-email-mst@redhat.com> <20160307131648.397a2033@nial.brq.redhat.com> <20160307142142-mutt-send-email-mst@redhat.com> <20160307154947.4da853e4@nial.brq.redhat.com> <20160307170422-mutt-send-email-mst@redhat.com> <20160307171719.2cb4f2de@nial.brq.redhat.com> Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Cc: Xiao Guangrong , ehabkost@redhat.com, kvm@vger.kernel.org, gleb@kernel.org, mtosatti@redhat.com, qemu-devel@nongnu.org, stefanha@redhat.com, pbonzini@redhat.com, dan.j.williams@intel.com, rth@twiddle.net To: Igor Mammedov Return-path: Content-Disposition: inline In-Reply-To: <20160307171719.2cb4f2de@nial.brq.redhat.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+gceq-qemu-devel=gmane.org@nongnu.org Sender: qemu-devel-bounces+gceq-qemu-devel=gmane.org@nongnu.org List-Id: kvm.vger.kernel.org On Mon, Mar 07, 2016 at 05:17:19PM +0100, Igor Mammedov wrote: > > > So what would happen when PCI MMIO BAR would be mapped over above range, > > > since guest thinks it's free to use it as unused resource? > > > > IIRC, allocating MMIO BAR over RAM would make the MMIO invisible, > > irrespective of whether the RAM range is being used for anything. > An then driver would start writing 'garbage' to RAM, resulting in > strange guest behavior and not work PCI device. Do you observe such behaviour? > that's why reserving region is a good idea if it could be done. Which region? Reserve all of RAM in _CRS? > > > > > > > > > > > > > > So we should either reserve range or punch a hole in PCI0._CRS. > > > > > Reserving ranges is simpler and that's what we've switched to > > > > > from manual hole punching, see PCI/CPU/Memory hotplug and other > > > > > motherboard resources.