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From: James Hogan <james.hogan@imgtec.com>
To: "Maciej W. Rozycki" <macro@imgtec.com>
Cc: "Ralf Baechle" <ralf@linux-mips.org>,
	"Paul Burton" <paul.burton@imgtec.com>,
	"Manuel Lauss" <manuel.lauss@gmail.com>,
	"Jayachandran C." <jchandra@broadcom.com>,
	"Paolo Bonzini" <pbonzini@redhat.com>,
	"Radim Krčmář" <rkrcmar@redhat.com>,
	linux-mips@linux-mips.org, kvm@vger.kernel.org
Subject: Re: [PATCH 0/7] MIPS: Add extended ASID support
Date: Mon, 9 May 2016 20:04:42 +0100	[thread overview]
Message-ID: <20160509190442.GC23699@jhogan-linux.le.imgtec.org> (raw)
In-Reply-To: <alpine.DEB.2.00.1605091756520.6794@tp.orcam.me.uk>

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On Mon, May 09, 2016 at 06:01:27PM +0100, Maciej W. Rozycki wrote:
> On Mon, 9 May 2016, Ralf Baechle wrote:
> 
> > Already PMC-Sierra's RM9000 / E9000 core had an extended ASID field, of
> > 12 bits for 4096 ASID contexts.  Afaics this was an extension derived
> > in-house back in the wild days before everything had to be sanctioned by
> > the architecture folks, so there is nothing in a config register to test
> > for it.
> 
>  Couldn't you just probe it in EntryHi directly, by writing all-ones, 
> reading back and seeing how many bits have stuck?

Note, the tlbinv feature in recent versions of MIPS32/MIPS64 arch has
EHINV bit in bit 10 (if I remember right) of EntryHi, which marks whole
tlb entry as invalid, and the small pages feature (for 1k pages) extends
VPN field downwards to bit 11.

Cheers
James

> 
> > PMCS simply extended the ASID field to 12 bits; no of the EntryHi bits
> > which today would conflict doing so did exist back then.
> 
>  Especially as it was as simple like that -- bits 12:8 were hardwired to 
> zeros in the usual implementations back then.
> 
>   Maciej

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  reply	other threads:[~2016-05-09 19:04 UTC|newest]

Thread overview: 18+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-05-06 13:36 [PATCH 0/7] MIPS: Add extended ASID support James Hogan
2016-05-06 13:36 ` [PATCH 1/7] MIPS: KVM/locore.S: Don't preserve host ASID around vcpu_run James Hogan
2016-05-09 14:22   ` Paolo Bonzini
2016-05-09 15:30     ` Ralf Baechle
2016-05-09 19:42       ` James Hogan
2016-05-06 13:36 ` [PATCH 2/7] MIPS: Add & use CP0_EntryHi ASID definitions James Hogan
2016-05-06 13:36 ` [PATCH 3/7] MIPS: KVM: Abstract guest ASID mask James Hogan
2016-05-06 13:36 ` [PATCH 4/7] MIPS: KVM/locore.S: Only preserve callee saved registers James Hogan
2016-05-06 13:36 ` [PATCH 5/7] MIPS: KVM/locore.S: Relax noat James Hogan
2016-05-06 13:36 ` [PATCH 6/7] MIPS: Retrieve ASID masks using function accepting struct cpuinfo_mips James Hogan
2016-05-06 13:36 ` [PATCH 7/7] MIPS: Support extended ASIDs James Hogan
2016-05-09 13:23 ` [PATCH 0/7] MIPS: Add extended ASID support Ralf Baechle
2016-05-09 17:01   ` Maciej W. Rozycki
2016-05-09 19:04     ` James Hogan [this message]
2016-05-09 19:56       ` Maciej W. Rozycki
2016-05-09 19:59         ` James Hogan
2016-05-10  7:34         ` Ralf Baechle
2016-05-10  8:55           ` Maciej W. Rozycki

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