From: Alex Williamson <alex.williamson@redhat.com>
To: "Kevin O'Connor" <kevin@koconnor.net>
Cc: seabios@seabios.org, allen.m.kay@intel.com,
qemu-devel@nongnu.org, kvm@vger.kernel.org,
"Michael S. Tsirkin" <mst@redhat.com>,
Igor Mammedov <imammedo@redhat.com>
Subject: Re: [RFC PATCH v4] fw/pci: Add support for mapping Intel IGD via QEMU
Date: Wed, 11 May 2016 12:39:08 -0600 [thread overview]
Message-ID: <20160511123908.4b6731fc@t450s.home> (raw)
In-Reply-To: <20160511151924.GB14689@morn.lan>
On Wed, 11 May 2016 11:19:25 -0400
"Kevin O'Connor" <kevin@koconnor.net> wrote:
> On Tue, May 10, 2016 at 09:19:52AM -0600, Alex Williamson wrote:
> > On Tue, 23 Feb 2016 10:22:33 -0500
> > "Kevin O'Connor" <kevin@koconnor.net> wrote:
> >
> > > On Tue, Feb 16, 2016 at 02:39:27PM -0700, Alex Williamson wrote:
> > > > QEMU provides two fw_cfg files to support IGD. The first holds the
> > > > OpRegion data which holds the Video BIOS Table (VBT). This needs to
> > > > be copied into reserved memory and the address stored in the ASL
> > > > Storage register of the device at 0xFC offset in PCI config space.
> > > > The OpRegion is generally 8KB. This file is named "etc/igd-opregion".
> > > >
> > > > The second file tells us the required size of the stolen memory space
> > > > for the device. This is a dummy file, it has no backing so we only
> > > > allocate the space without copying anything into it. This space
> > > > requires 1MB alignment and is generally either 1MB or 2MB, depending
> > > > on the hardware config. If the user has opted in QEMU to expose
> > > > additional stolen memory beyond the GTT (GGMS), the GMS may add an
> > > > additional 32MB to 512MB. The base address of the reserved memory
> > > > allocated for this is written back to the Base Data of Stolen Memory
> > > > register (BDSM) at PCI config offset 0x5C on the device. This file is
> > > > named "etc/igd-bdsm".
> > >
> > > Thanks. I'd be interested in seeing how the discussion with Michael
> > > and Igor works out (wrt using a standardized interface for
> > > communicating addresses between qemu and firmware) before adopting
> > > this interface in SeaBIOS.
> >
> > Apologies if I missed it, but I haven't seen any work in this
> > direction, please point me to it if I'm wrong. Now that QEMU 2.6 is
> > wrapping up, I'd like to get IGD assignment support in for 2.7, but we
> > can't do that without BIOS support. How shall we proceed? Thanks,
>
> If there's no consensus on standardizing the qemu/firmware interface
> for addresses then I'm okay with the custom solution you last
> proposed. So, I'd say submit your patches and if they are accepted in
> QEMU then I will follow suit and apply them to SeaBIOS.
Thanks Kevin, I'll post the proposed fw_cfg files as a separate RFC to
QEMU to make sure they get eyes on them rather than just having them
buried in a patch and we'll go from there. Thanks,
Alex
prev parent reply other threads:[~2016-05-11 18:39 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-02-16 21:39 [RFC PATCH v4] fw/pci: Add support for mapping Intel IGD via QEMU Alex Williamson
2016-02-17 11:09 ` Tian, Kevin
2016-02-17 13:49 ` Alex Williamson
2016-02-18 6:43 ` Tian, Kevin
2016-02-23 15:22 ` Kevin O'Connor
2016-05-10 15:19 ` Alex Williamson
2016-05-11 10:07 ` [Qemu-devel] " Igor Mammedov
2016-05-11 15:19 ` Kevin O'Connor
2016-05-11 18:39 ` Alex Williamson [this message]
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