From mboxrd@z Thu Jan 1 00:00:00 1970 From: Christoffer Dall Subject: Re: [PATCH v4 28/56] KVM: arm/arm64: vgic-new: Add PRIORITY registers handlers Date: Wed, 18 May 2016 16:15:47 +0200 Message-ID: <20160518141547.GE6666@cbox> References: <1463392481-26583-1-git-send-email-andre.przywara@arm.com> <1463392481-26583-29-git-send-email-andre.przywara@arm.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Cc: Marc Zyngier , linux-arm-kernel@lists.infradead.org, kvmarm@lists.cs.columbia.edu, kvm@vger.kernel.org To: Andre Przywara Return-path: Content-Disposition: inline In-Reply-To: <1463392481-26583-29-git-send-email-andre.przywara@arm.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: kvmarm-bounces@lists.cs.columbia.edu Sender: kvmarm-bounces@lists.cs.columbia.edu List-Id: kvm.vger.kernel.org On Mon, May 16, 2016 at 10:53:16AM +0100, Andre Przywara wrote: > The priority register handlers are shared between the v2 and v3 > emulation, so their implementation goes into vgic-mmio.c, to be > easily referenced from the v3 emulation as well later. > There is a corner case when we change the priority of a pending > interrupt which we don't handle at the moment. > > Signed-off-by: Andre Przywara Reviewed-by: Christoffer Dall