From mboxrd@z Thu Jan 1 00:00:00 1970 From: Radim =?utf-8?B?S3LEjW3DocWZ?= Subject: Re: [PATCH v3] KVM: Handle MSR_IA32_PERF_CTL Date: Tue, 31 May 2016 15:16:31 +0200 Message-ID: <20160531131630.GB30721@potion> References: <770161464247923@webcorp02g.yandex-team.ru> <20160526203931.GB25334@potion> <20160526204439.GF2186@HEDWIG.INI.CMU.EDU> <920591464331762@webcorp02f.yandex-team.ru> <20160527152224.GA11721@potion> <20160527153850.GC11721@potion> <1189746463.18391609.1464681232913.JavaMail.zimbra@redhat.com> <1317601464689200@webcorp01d.yandex-team.ru> Mime-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: QUOTED-PRINTABLE Cc: Paolo Bonzini , "Gabriel L. Somlo" , "linux-kernel@vger.kernel.org" , "kvm@vger.kernel.org" , "gleb@kernel.org" To: kmeaw@yandex-team.ru Return-path: Content-Disposition: inline In-Reply-To: <1317601464689200@webcorp01d.yandex-team.ru> Sender: linux-kernel-owner@vger.kernel.org List-Id: kvm.vger.kernel.org 2016-05-31 13:06+0300, kmeaw@yandex-team.ru: > 31.05.2016, 11:21, "Paolo Bonzini" : > >> =C2=A02016-05-27 17:22+0200, Radim Kr=C4=8Dm=C3=A1=C5=99: > >> =C2=A0> (I wonder why MacOS X doesn't read IA32_PERF_STATUS, thoug= h.) > >> > >> =C2=A0Oh, it maybe does ... we already emulate status and return 0= x1000 in its > >> =C2=A0bottom 16 bits. I have no idea what is that supposed to mean= , but I > >> =C2=A0think we should return 0x1000 in IA32_PERF_CTL then. > > > > It's 1000, not 0x1000 (instead, on real hardware the value is typic= ally a > > multiple of 256). It was added for Darwin too. > > > > Returning different values is okay, because they are different on r= eal > > hardware too: > > > > (sudo dd if=3D/dev/cpu/0/msr skip=3D$((0x198)) iflag=3Dskip_bytes b= s=3D8 count=3D1; > > =C2=A0sudo dd if=3D/dev/cpu/0/msr skip=3D$((0x199)) iflag=3Dskip_by= tes bs=3D8 count=3D1) | od -tx8 > > 0000000 00001f3900001100 0000000000001300 > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0^^^^^^^^^^^^^^^^ ^^= ^^^^^^^^^^^^^^ > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0PERF_STATUS PERF_CT= L > > > > And perhaps if we returned non-zero values for PERF_CTL Darwin woul= d try to > > write to it. So returning zero is fine, I think. There is no correc= t answer... >=20 > Thank you. I have removed MSR_IA32_PERF_CTL from emulated_msrs[]. Ret= urning > 1000 (0x3e8) for PERF_STATUS and 0 for PERF_CTL works fine with MacOS= X. >=20 > Just in case here are MSRs from i5-4460: > PERF_STATUS: 0000202800002100 > PERF_CTL: 0000000000002200 >=20 > Chaning KVM's PERL_CTL from 0 to 0x2200 does not seem to interfere wi= th MacOS X > boot process. It does not attempt to wrmsr into this register. >=20 > Here is a refined version of the patch: > --=20 >=20 > From: Dmitry Bilunov >=20 > Intel CPUs having Turbo Boost feature implement an MSR to provide a > control interface via rdmsr/wrmsr instructions. One could detect the > presence of this feature by issuing one of these instructions and > handling the #GP exception which is generated in case the referenced = MSR > is not implemented by the CPU. >=20 > KVM's vCPU model behaves exactly as a real CPU in this case by inject= ing > a fault when MSR_IA32_PERF_CTL is called (which KVM does not support)= =2E > However, some operating systems use this register during an early boo= t > stage in which their kernel is not capable of handling #GP correctly, > causing #DP and finally a triple fault effectively resetting the vCPU= =2E >=20 > This patch implements a dummy handler for MSR_IA32_PERF_CTL to avoid = the > crashes. > --- The code looks good. Please resend with your signed-off-by and preserved writespace (tabs were converted to spaces), thanks. > arch/x86/kvm/x86.c | 1 + > 1 file changed, 1 insertion(+) >=20 > diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c > index c805cf4..d0a5b4b 100644 > --- a/arch/x86/kvm/x86.c > +++ b/arch/x86/kvm/x86.c > @@ -2314,6 +2314,7 @@ int kvm_get_msr_common(struct kvm_vcpu *vcpu, s= truct msr_data *msr_info) > case MSR_AMD64_NB_CFG: > case MSR_FAM10H_MMIO_CONF_BASE: > case MSR_AMD64_BU_CFG2: > + case MSR_IA32_PERF_CTL: > msr_info->data =3D 0; > break; > case MSR_K7_EVNTSEL0 ... MSR_K7_EVNTSEL3: > --=20 > 2.8.2