From mboxrd@z Thu Jan 1 00:00:00 1970 From: Radim =?utf-8?B?S3LEjW3DocWZ?= Subject: Re: [PATCH] KVM: Handle MSR_IA32_PERF_CTL Date: Tue, 31 May 2016 16:57:22 +0200 Message-ID: <20160531145722.GA30930@potion> References: <20160531131630.GB30721@potion> <1464705504-18243-1-git-send-email-kmeaw@yandex-team.ru> Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Cc: pbonzini@redhat.com, gsomlo@gmail.com, linux-kernel@vger.kernel.org, kvm@vger.kernel.org, gleb@kernel.org To: Dmitry Bilunov Return-path: Received: from mx1.redhat.com ([209.132.183.28]:36964 "EHLO mx1.redhat.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753686AbcEaO51 (ORCPT ); Tue, 31 May 2016 10:57:27 -0400 Content-Disposition: inline In-Reply-To: <1464705504-18243-1-git-send-email-kmeaw@yandex-team.ru> Sender: kvm-owner@vger.kernel.org List-ID: 2016-05-31 17:38+0300, Dmitry Bilunov: > Intel CPUs having Turbo Boost feature implement an MSR to provide a > control interface via rdmsr/wrmsr instructions. One could detect the > presence of this feature by issuing one of these instructions and > handling the #GP exception which is generated in case the referenced MSR > is not implemented by the CPU. > > KVM's vCPU model behaves exactly as a real CPU in this case by injecting > a fault when MSR_IA32_PERF_CTL is called (which KVM does not support). > However, some operating systems use this register during an early boot > stage in which their kernel is not capable of handling #GP correctly, > causing #DP and finally a triple fault effectively resetting the vCPU. > > This patch implements a dummy handler for MSR_IA32_PERF_CTL to avoid the > crashes. > > Signed-off-by: Dmitry Bilunov > --- Applied, thank you. > arch/x86/kvm/x86.c | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c > index c805cf4..d0a5b4b 100644 > --- a/arch/x86/kvm/x86.c > +++ b/arch/x86/kvm/x86.c > @@ -2314,6 +2314,7 @@ int kvm_get_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info) > case MSR_AMD64_NB_CFG: > case MSR_FAM10H_MMIO_CONF_BASE: > case MSR_AMD64_BU_CFG2: > + case MSR_IA32_PERF_CTL: > msr_info->data = 0; > break; > case MSR_K7_EVNTSEL0 ... MSR_K7_EVNTSEL3: > -- > 2.8.2 >