Re: [PATCH v3 1/2] target-i386: KVM: add basic Intel LMCE support

[Eduardo Habkost <ehabkost@redhat.com>]

On Sat, Jun 04, 2016 at 12:34:39PM +0200, Boris Petkov wrote:
> Haozhong Zhang <haozhong.zhang@intel.com> wrote:
> 
> >This patch adds the support to inject SRAR and SRAO as LMCE, i.e. they
> >will be injected to only one VCPU rather than broadcast to all
> >VCPUs. As KVM reports LMCE support on Intel platforms, this features is
> >only available on Intel platforms.
> >
> >Signed-off-by: Ashok Raj <ashok.raj@intel.com>
> >Signed-off-by: Haozhong Zhang <haozhong.zhang@intel.com>
> >---
> >Cc: Paolo Bonzini <pbonzini@redhat.com>
> >Cc: Richard Henderson <rth@twiddle.net>
> >Cc: Eduardo Habkost <ehabkost@redhat.com>
> >Cc: Marcelo Tosatti <mtosatti@redhat.com>
> >Cc: Boris Petkov <bp@suse.de>
> >Cc: kvm@vger.kernel.org
> >Cc: Tony Luck <tony.luck@intel.com>
> >Cc: Andi Kleen <andi.kleen@intel.com>
> >---
> > target-i386/cpu.c | 26 ++++++++++++++++++++++++++
> > target-i386/cpu.h | 13 ++++++++++++-
> > target-i386/kvm.c | 35 +++++++++++++++++++++++++++++++----
> > 3 files changed, 69 insertions(+), 5 deletions(-)
> 
> ...
> 
> >@@ -1173,6 +1182,8 @@ struct X86CPU {
> >      */
> >     bool enable_pmu;
> > 
> >+    bool enable_lmce;
> 
> That struct would go fat pretty fast if it grows a bool per CPU
> feature. Perhaps a more clever, a-bit-per-featurebit scheme
> would be in order.

We already have X86CPU.features, but it's specific for feature
flags appearing on CPUID. We can eventually extend
FeatureWord/FeatureWordInfo/x86_cpu_get_supported_feature_word()
to represent features that don't appear directly on CPUID.

-- 
Eduardo