Re: [PATCH 8/9] MIPS: KVM: Decode RDHWR more strictly

[Ralf Baechle <ralf@linux-mips.org>]

On Tue, Jul 05, 2016 at 02:16:48PM +0300, Sergei Shtylyov wrote:

> > When KVM emulates the RDHWR instruction, decode the instruction more
> > strictly. The rs field (bits 25:21) should be zero, as should bits 10:9.
> > Bits 8:6 is the register select field in MIPSr6, so we aren't strict
> > about those bits (no other operations should use that encoding space).
> > 
> > Signed-off-by: James Hogan <james.hogan@imgtec.com>
> > Cc: Paolo Bonzini <pbonzini@redhat.com>
> > Cc: Radim Krčmář <rkrcmar@redhat.com>
> > Cc: Ralf Baechle <ralf@linux-mips.org>
> > Cc: linux-mips@linux-mips.org
> > Cc: kvm@vger.kernel.org
> > ---
> >  arch/mips/kvm/emulate.c | 4 +++-
> >  1 file changed, 3 insertions(+), 1 deletion(-)
> > 
> > diff --git a/arch/mips/kvm/emulate.c b/arch/mips/kvm/emulate.c
> > index 62e6a7b313ae..be18dfe9ecaa 100644
> > --- a/arch/mips/kvm/emulate.c
> > +++ b/arch/mips/kvm/emulate.c
> > @@ -2357,7 +2357,9 @@ enum emulation_result kvm_mips_handle_ri(u32 cause, u32 *opc,
> >  	}
> > 
> >  	if (inst.r_format.opcode == spec3_op &&
> > -	    inst.r_format.func == rdhwr_op) {
> > +	    inst.r_format.func == rdhwr_op &&
> > +	    inst.r_format.rs == 0 &&
> > +	    (inst.r_format.re >> 3) == 0) {
> 
>    Inner parens not necessary here.

While I often strip unnecessary parens from patches I apply my guideline for
leaving them in is that nobody should need to know all C operator priorities
by heart.

  Ralf