From: "Radim Krčmář" <rkrcmar@redhat.com>
To: Suravee Suthikulpanit <Suravee.Suthikulpanit@amd.com>
Cc: joro@8bytes.org, pbonzini@redhat.com, alex.williamson@redhat.com,
kvm@vger.kernel.org, linux-kernel@vger.kernel.org,
sherry.hurwitz@amd.com
Subject: Re: [PART2 PATCH v5 12/12] svm: Implements update_pi_irte hook to setup posted interrupt
Date: Tue, 16 Aug 2016 18:33:29 +0200 [thread overview]
Message-ID: <20160816163329.GE12385@potion> (raw)
In-Reply-To: <a1abc67a-14de-98a6-8ac4-6e1d73004115@amd.com>
2016-08-16 22:19+0700, Suravee Suthikulpanit:
> On 8/13/16 19:03, Radim Krčmář wrote:
>> 2016-07-25 04:32-0500, Suravee Suthikulpanit:
>> > diff --git a/arch/x86/kvm/svm.c b/arch/x86/kvm/svm.c
>> > @@ -1485,9 +1521,16 @@ static void avic_set_running(struct kvm_vcpu *vcpu, bool is_run)
>> > +static void svm_pi_list_add(struct vcpu_svm *svm, struct amd_iommu_pi_data *pi)
>> > +{
>> > + bool found = false;
>> > + unsigned long flags;
>> > + struct amd_iommu_pi_data *cur;
>> > +
>> > + spin_lock_irqsave(&svm->pi_list_lock, flags);
>> > + list_for_each_entry(cur, &svm->pi_list, node) {
>> > + if (cur->ir_data != pi->ir_data)
>> > + continue;
>> > + found = true;
>>
>> This optimization turned out to be ugly ... sorry.
>
> That's okay. It makes sense to avoid using the hash table if we can.
>
>> Manipulation with pi_list is hard to understand, IMO, so a comment
>> explaining why we couldn't do that without traversing a list and
>> comparing pi->ir_data would be nice.
>
> I'll add more comment here.
Thanks.
>> Maybe I was a bit confused by reusing amd_iommu_pi_data when all we care
>> about is a list of cur->ir_data -- can't we have a list of just ir_data?
>
> Actually, in SVM, we care about posted-interrupt information, which is
> generated from the SVM side, and stored in the amd_iommu_pi_data. This is
> also communicated to IOMMU via the irq_set_vcpu_affinity().
>
> Here, I only use ir_data to differentiate amd_iommu_pi_data.
I'm still confused then. :)
struct amd_iommu_pi_data is a throwaway structure for I/O with
irq_set_vcpu_affinity(), but we keep it afterwards ...
is it more than a wrapper that allows us to put ir_data into a list,
because we don't want to add list_head directly to ir_data?
next prev parent reply other threads:[~2016-08-16 16:33 UTC|newest]
Thread overview: 27+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-07-25 9:31 [PART2 PATCH v5 00/12] iommu/AMD: Introduce IOMMU AVIC support Suravee Suthikulpanit
2016-07-25 9:32 ` [PART2 PATCH v5 01/12] iommu/amd: Detect and enable guest vAPIC support Suravee Suthikulpanit
2016-08-09 14:30 ` Joerg Roedel
2016-07-25 9:32 ` [PART2 PATCH v5 02/12] iommu/amd: Move and introduce new IRTE-related unions and structures Suravee Suthikulpanit
2016-07-25 9:32 ` [PART2 PATCH v5 03/12] iommu/amd: Introduce interrupt remapping ops structure Suravee Suthikulpanit
2016-07-25 9:32 ` [PART2 PATCH v5 04/12] iommu/amd: Add support for multiple IRTE formats Suravee Suthikulpanit
2016-07-25 9:32 ` [PART2 PATCH v5 05/12] iommu/amd: Detect and initialize guest vAPIC log Suravee Suthikulpanit
2016-07-25 9:32 ` [PART2 PATCH v5 06/12] iommu/amd: Adding GALOG interrupt handler Suravee Suthikulpanit
2016-08-09 14:43 ` Joerg Roedel
2016-08-16 2:43 ` Suravee Suthikulpanit
2016-07-25 9:32 ` [PART2 PATCH v5 07/12] iommu/amd: Introduce amd_iommu_update_ga() Suravee Suthikulpanit
2016-07-25 9:32 ` [PART2 PATCH v5 08/12] iommu/amd: Implements irq_set_vcpu_affinity() hook to setup vapic mode for pass-through devices Suravee Suthikulpanit
2016-07-25 9:32 ` [PART2 PATCH v5 09/12] iommu/amd: Enable vAPIC interrupt remapping mode by default Suravee Suthikulpanit
2016-08-09 14:54 ` Joerg Roedel
2016-07-25 9:32 ` [PART2 PATCH v5 10/12] svm: Introduces AVIC per-VM ID Suravee Suthikulpanit
2016-08-12 14:16 ` Radim Krčmář
2016-08-18 12:24 ` Suravee Suthikulpanit
2016-07-25 9:32 ` [PART2 PATCH v5 11/12] svm: Introduce AMD IOMMU avic_ga_log_notifier Suravee Suthikulpanit
2016-08-12 14:27 ` Radim Krčmář
2016-07-25 9:32 ` [PART2 PATCH v5 12/12] svm: Implements update_pi_irte hook to setup posted interrupt Suravee Suthikulpanit
2016-08-13 12:03 ` Radim Krčmář
2016-08-16 15:19 ` Suravee Suthikulpanit
2016-08-16 16:33 ` Radim Krčmář [this message]
2016-08-18 15:43 ` Suravee Suthikulpanit
2016-08-08 14:42 ` [PART2 PATCH v5 00/12] iommu/AMD: Introduce IOMMU AVIC support Suravee Suthikulpanit
2016-08-09 14:58 ` Joerg Roedel
2016-08-12 4:11 ` Suravee Suthikulpanit
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20160816163329.GE12385@potion \
--to=rkrcmar@redhat.com \
--cc=Suravee.Suthikulpanit@amd.com \
--cc=alex.williamson@redhat.com \
--cc=joro@8bytes.org \
--cc=kvm@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=pbonzini@redhat.com \
--cc=sherry.hurwitz@amd.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).